David A Potts

US Patent:

56338791, May 27, 1997

Filed:

Jan 19, 1996

Appl. No.:

8/591256

Inventors:

David J. Potts - Houston TX
John Ribe - West Chicago IL
Kevin L. Kornher - Dallas TX
Roger Griesmer - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 1100

US Classification:

371 27

Abstract:

A method for testing an integrated circuit using a tester. The tester has internal periods for timing reference. The integrated circuit has one or more input ports, one or more output ports and a logic circuit disposed between the input ports and the output ports. The tester applies an input signal to one or more of the input ports, the input signal being synchronous to the internal periods of the tester, such that, by the operation of the logic circuit, an output signal appears at one or more of the output ports. The method comprises the following steps. First, a first output port is selected having a predetermined signal event that occurs at the first output port during a predetermined time range, the predetermined time range being determined with respect to the internal period. Then, the predetermined signal event is used as a timing reference for a test event of the integrated circuit, the test event occurring a predetermined time interval from the predetermined event.