David W Randall

US Patent:

6530031, Mar 4, 2003

Filed:

Nov 8, 1999

Appl. No.:

09/436113

Inventors:

David Lee Randall - Leander TX
David Ross Willoughby - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 114

US Classification:

713502, 713 2, 714 36, 710 10

Abstract:

A method and apparatus to provide accurate and automated timing of firmware routines, such as initialization tasks at boot time, is provided. Since each task sends a progress indicator code to a display buffer when it starts to run, by saving processor time stamps at the time these codes change, it is possible to calculate and store the time duration for each routine. In the case of system initialization, these time durations can be an indication of problems if they are much longer than normal or an indication of excessive, inefficient, or ineffective processing that might be speed up in order to reduce the total boot time.

US Patent:

6574752, Jun 3, 2003

Filed:

Jul 15, 1999

Appl. No.:

09/353973

Inventors:

George Henry Ahrens - Pflugerville TX
John C. Kennel - Austin TX
Jeffrey Scott Mayes - Austin TX
Maulin Ishwarbhai Patel - Round Rock TX
David Lee Randall - Leander TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H02H 305

US Classification:

714 43, 714 6, 711148

Abstract:

A method, system and computer program are described for isolating bus errors detected during system start-up by utilizing a technique in which a shared mailbox associated with a service processor is provided for holding the address of an adapter in an I/O drawer. If an error is detected the server processor is notified. The server processor then retrieves the address from the mailbox, uses it to derive a location code which is then passed along with the error code to an appropriate error analysis routine. The start-up procedure is then shut down.

US Patent:

6625728, Sep 23, 2003

Filed:

Nov 2, 1999

Appl. No.:

09/431797

Inventors:

George Henry Ahrens - Pflugerville TX
George John Dawkins - Austin TX
Michael Youhour Lim - Leander TX
Thomas Francis Ploski - Tucson AZ
David Lee Randall - Leander TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 126

US Classification:

713 2, 713 1, 713330, 713310, 713340, 713300

Abstract:

A method for locating a defective component in a data processing system during system startup is disclosed. Each component within the data processing system is assigned a location code. Then, a progress code is associated with a location code and a function being loaded to, tested, or executed in a component. After supplying power to the data processing system, the components of the data processing system are initialized and tested to establish a configuration. During the initialization and testing, a location code of a component and a corresponding progress code are displayed on a display panel. In response to a system hang, a defective component can be identified utilizing the location code and the progress code displayed on the display panel.

US Patent:

6665759, Dec 16, 2003

Filed:

Mar 1, 2001

Appl. No.:

09/798294

Inventors:

George John Dawkins - Austin TX
Van Hoa Lee - Cedar Park TX
David Lee Randall - Leander TX
Kiet Anh Tran - Cedar Park TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1214

US Classification:

710200, 710 22, 710 26, 710 27, 710 28, 710308, 710312, 710313, 710314, 710315, 711152, 711153

Abstract:

A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a hypervisor and at least one DMA address checking component. The hypervisor receives non-direct-memory-access requests for access to input/output slots and prohibits devices within one logical partition from accessing the input/output slots assigned to a different logical partition. The DMA address checking component receives direct-memory-access requests and prohibits requests for addresses not within the same logical partition as the requesting device from being completed. Requests with addresses corresponding to the same logical partition as the requesting device are placed on the primary PCI bus by the DMA address checking component for delivery to the system memory.

US Patent:

6898731, May 24, 2005

Filed:

Jan 10, 2002

Appl. No.:

10/045280

Inventors:

Mark Elliott Hack - Cedar Park TX, US
Alongkorn Kitamorn - Austin TX, US
Gordon D. McIntosh - Austin TX, US
Kanisha Patel - Cedar Park TX, US
David Lee Randall - Leander TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F011/00

US Classification:

714 10, 714 9

Abstract:

A system, method, and computer program product are disclosed for preventing machine crashes due to hard errors in one of multiple, different processors that are included in a logically partitioned data processing system. An error occurring in one of the processors is detected. A determination is then made regarding whether the processor has been deconfigured. The partition is then rebooted only in response to a determination that the processor has been deconfigured and will not be included in the partition processor resources. Thus, only the configured processors are rebooted. The deconfigured processor is not rebooted.

US Patent:

6901537, May 31, 2005

Filed:

Feb 27, 2002

Appl. No.:

10/087921

Inventors:

George John Dawkins - Austin TX, US
Mark Elliott Hack - Cedar Park TX, US
Ashwini Kulkarni - Austin TX, US
Gordon D. McIntosh - Austin TX, US
Kanisha Patel - Cedar Park TX, US
David Lee Randall - Leander TX, US
David R. Willoughby - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F011/00

US Classification:

714 43, 714 36

Abstract:

A method, apparatus, and computer instructions for halting input/output error propagation in the logically partitioned data processing system. All components associated with the bridge are identified to form a set of failed components in response to detecting an error state in a bridge within a set of bridges in the logical partitioned data processing system. An identification of the failed components is stored in which the identification is used by each partition during a boot process.

US Patent:

6961785, Nov 1, 2005

Filed:

Aug 3, 2000

Appl. No.:

09/631723

Inventors:

Richard Louis Arndt - Austin TX, US
Tam D. Bui - Austin TX, US
Van Hoa Lee - Cedar Park TX, US
David Lee Randall - Leander TX, US
Kiet Anh Tran - Cedar Park TX, US
David R. Willoughby - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F003/00
G06F013/00

US Classification:

710 9, 710104, 710302, 713 1

Abstract:

A system for managing input/output drawers within a data processing system. A unique identifier is assigned to each of a plurality of drawers, and is used by the operating system to identify the drawers in the system regardless of how these drawers are interconnected. Another unique PCI-bridge identifier is assigned to each of a plurality of PCI Host bridges (PHBs) from all drawers, and is used by the operating system to perform input/output processes to devices associated with the plurality of PHBs such that the ODM object for each of the PHBs remains the same regardless of how the drawer is interconnected in the system. When a new drawer is added to the system, a new unique identifier is assigned to the new drawer ensuring that the unique identifiers previously assigned to the other drawers are not used to identify the new drawer.

US Patent:

6968477, Nov 22, 2005

Filed:

Mar 7, 2002

Appl. No.:

10/093434

Inventors:

Chetan Mehta - Austin TX, US
Jayeshkumar M. Patel - Austin TX, US
Manesh Patel - Austin TX, US
David Lee Randall - Leander TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F011/00

US Classification:

714 31, 714 36, 714 48, 710 10, 713 1, 713 2, 713502

Abstract:

A system and method for monitoring a host computer using a service processor is provided. A shared nonvolatile random access memory (NVRAM) area is used to store progress information from the host computer system. The host computer system writes progress information corresponding to the initialization step being performed to the shared NVRAM and also updates a host pointer in the NVRAM. The service processor reads the shared NVRAM and compares its pointer with the host pointer to determine whether new host initialization activity has been reported. The service processor sets a timer so that if host activity is not reported during a set amount of time an error condition occurs causing the service processor to handle the host computer error. An optional service processor routine determines whether the host computer is stuck in an initialization loop whereupon the service processor once again handles the host computer error.