David Keith Seto

US Patent:

42427916, Jan 6, 1981

Filed:

Sep 21, 1979

Appl. No.:

6/077699

Inventors:

Cheng T. Horng - Fishkill NY
Harold V. Lillja - Peekskill NY
David K. Seto - LaGrangeville NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

B01J 1700

US Classification:

29578

Abstract:

Disclosed is a method for fabricating very high performance semiconductor devices, particularly bipolar-type transistors having a heavily doped inactive base and a lightly doped narrow active base formed by ion implantation. In order to prevent the high dose boron implantation, for an NPN transistor, from getting into the active base region, a self-aligned mask covering the emitter contact i. e. , active base region, is required for inactive base implantation. The self-aligned mask is anodically oxidized aluminum pads. The device wafer metallized with blanket aluminum film is immersed in a dilute H. sub. 2 SO. sub. 4 solution electrolytic cell which selectively anodizes only the aluminum lands situated over the Si. sub. 3 N. sub. 4 /SiO. sub. 2 defined device contact windows. The aluminum oxide formed by anodization process is porous but may be sealed and densified.