David Alexander Simpson

US Patent:

20220326951, Oct 13, 2022

Filed:

Jun 29, 2022

Appl. No.:

17/852821

Inventors:

- San Mateo CA, US
David Simpson - Los Angeles CA, US

International Classification:

G06F 9/30

Abstract:

A new device executing an application on a new central processing unit (CPU), determines whether the application is for a legacy device having a legacy CPU. When the new device determines that the application is for the legacy device, it executes the application on the new CPU with selected available resources of the new device restricted to approximate or match a processing behavior of the legacy CPU, e.g., by reducing a usable portion of a return address stack of the new CPU and thereby reducing a number of calls and associated returns that can be tracked

US Patent:

20210311856, Oct 7, 2021

Filed:

Jun 21, 2021

Appl. No.:

17/353675

Inventors:

- San Mateo CA, US
David Simpson - Los Angeles CA, US

International Classification:

G06F 11/36
G06F 12/084
G06F 12/0875
G06F 12/1045
G06F 9/30
G06F 9/46

Abstract:

A device having a Graphics Processing Unit (GPU) may be configured to selectively run in a normal mode or a timing testing mode. In the timing testing mode the device is configured to disrupt timing of processing that takes place on the GPU while running an application with the GPU and test the application for errors in device hardware component and/or software component synchronization while the device is running in the timing testing mode.

US Patent:

20200372602, Nov 26, 2020

Filed:

Aug 11, 2020

Appl. No.:

16/990680

Inventors:

- San Mateo CA, US
David Simpson - Los Angeles CA, US
Jason Scanlin - Los Angeles CA, US

International Classification:

G06T 1/20

Abstract:

A graphics processing may include implementing a vertex shader and a pixel shader with a GPU. Vertex parameter values generated by the vertex shader may be stored in a memory. The pixel shader may access the vertex parameter values stored in the memory. Accessing the vertex parameter values may include disabling or bypassing hardware that performs interpolation on vertex parameter values. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

US Patent:

20190035050, Jan 31, 2019

Filed:

Sep 27, 2018

Appl. No.:

16/145003

Inventors:

- Tokyo, JP
David Simpson - Los Angeles CA, US
Jason Scanlin - Los Angeles CA, US

International Classification:

G06T 1/20
G06T 15/00
G06T 1/60

Abstract:

Graphics processing may include implementing a vertex shader and a pixel shader with the GPU. Vertex indices output from a vertex shader may be written to a cache. The vertex indices written to the cache may be accessed with the pixel shader and vertex parameter values associated with the vertex indices may be accessed from a memory unit with the pixel shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

US Patent:

20180336658, Nov 22, 2018

Filed:

Jul 31, 2018

Appl. No.:

16/050829

Inventors:

- Tokyo, JP
David Simpson - Los Angeles CA, US
Jason Scanlin - Los Angeles CA, US

International Classification:

G06T 1/20

Abstract:

A graphics processing may include implementing a vertex shader and a pixel shader with a GPU. Vertex parameter values may be compressed with the vertex shader and compressed vertex parameter values may be written to a cache. The pixel shader may access the compressed vertex parameter values that were written to the cache and decompress the compressed vertex parameter values. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

US Patent:

20180246802, Aug 30, 2018

Filed:

Apr 30, 2018

Appl. No.:

15/967246

Inventors:

- San Mateo CA, US
David Simpson - Los Angeles CA, US

International Classification:

G06F 11/36
G06F 9/30
G06F 12/084
G06F 12/0875
G06F 9/46
G06F 12/1045

Abstract:

A device may be run in a timing testing mode in which the device is configured to disrupt timing of processing that takes place on the one or more processors while running an application with the one or more processors. The application may be tested for errors while the device is running in the timing testing mode

US Patent:

20180004243, Jan 4, 2018

Filed:

Sep 12, 2017

Appl. No.:

15/701736

Inventors:

- San Mateo CA, US
David Simpson - Los Angeles CA, US

International Classification:

G06F 1/08
G06F 15/10
G06F 9/44

Abstract:

An application runs at a first operating frequency if the application is designed for a current version of a system and runs at a second operating frequency if the application is designed for a prior version of the system that operates at a lower frequency than the first operating frequency. The second operating frequency may be higher than the operating frequency of the prior version of the system to account for differences in latency, throughput or other processing characteristics between the two systems. Software readable cycle counters are based on a spoof clock running at the operating frequency of the prior version of the system, rather than the true operating frequency. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

US Patent:

20170286135, Oct 5, 2017

Filed:

Mar 22, 2017

Appl. No.:

15/466769

Inventors:

Mark Evan Cerny - Burbank CA, US
David Simpson - Los Angeles CA, US

Assignee:

Sony Interactive Entertainment Inc. - Tokyo

International Classification:

G06F 9/445
G06F 11/34
G06F 11/30

Abstract:

Performance of a new system may be optimized to run a legacy application written for a legacy system. Performance information for the legacy application is recorded or derived while running the legacy application on the new system. Performance characteristics for the legacy application running on the new system are determined by analyzing the performance information. The performance characteristics include one or more key performance metrics and other performance information. The key performance metrics must be met when the legacy application is run on the new system. The other performance information is useful for adjusting one or more operating parameters of the new system when running the legacy application on the new system. The one or more operating parameters are adjusted so that the one or more key performance metrics are met.