David W Snyder

US Patent:

6356785, Mar 12, 2002

Filed:

Aug 18, 1999

Appl. No.:

09/331998

Inventors:

Cecily Anne Snyder - San Francisco CA 94118
Bradford E. Gliner - Ilssaquah WA 98029
David E. Snyder - Bainbridge Island WA 98110

International Classification:

A61N 139

US Classification:

607 5

Abstract:

This invention relates generally to defibrillators and, in particular, to a defibrillator with a built in CPR (âCPRâ) prompt system. The invention also relates generally to a defibrillator with a built-in Advanced Cardiac Life Support (âACLSâ) prompt system. Defibrillators include manual defibrillator, automatic or semiautomatic external defibrillators (âAEDsâ) and defibrillator trainers. More specifically, this invention is directed to a defibrillator system capable of generating audible prompts and/or visual prompts through an audible prompt generator and a visual prompt generator, wherein the defibrillator instructs a rescuer on performing CPR or ACLS. The instructions are controlled through a prompt generator and may be audible prompts or visual images, or a combination of the two. The prompts may be emitted at a predetermined rate and may be synchronized. This invention is also directed to a method for administering care comprising, providing instructions to a rescuer.

US Patent:

20130082321, Apr 4, 2013

Filed:

Sep 30, 2011

Appl. No.:

13/249594

Inventors:

Harmeet Sobti - Portland OR, US
Timothy K. McGuire - Beaverton OR, US
David L. Snyder - Beaverton OR, US
Scott J. Alberhasky - Portland OR, US

Assignee:

Maxim Integrated Products, Inc. - Sunnyvale CA

International Classification:

H01L 29/78
H01L 21/336

US Classification:

257329, 438268, 257E29262, 257E2141

Abstract:

Semiconductor devices are described that include a dual-gate configuration. In one or more implementations, the semiconductor devices include a substrate having a first surface and a second surface. The substrate includes a first and a second body region formed proximal to the first surface. Moreover, each body region includes a source region formed therein. The substrate further includes a drain region formed proximal to the second surface and an epitaxial region that is configured to function as a drift region between the drain region and the source regions. A dual-gate is formed over the first surface of the substrate. The dual-gate includes a first gate region and a second gate region that define a gap there between to reduce the gate to drain capacitance.

US Patent:

20140080821, Mar 20, 2014

Filed:

May 25, 2012

Appl. No.:

14/119405

Inventors:

Alan S. Verkman - San Francisco CA, US
David S. Snyder - Davis CA, US

Assignee:

The Regents of the University of California - Oakland CA

International Classification:

C07D 498/14
C07D 487/14

US Classification:

5142295, 544 99, 544247, 514250

Abstract:

Provided herein are benzopyrimido-pyrrolo-oxazine-dione (BPO) compounds and pyrimido-pyrrolo-quinoxalinedione (PPQ) compounds, and compositions comprising these compounds, that inhibit cystic fibrosis transmembrane conductance regulator (CFTR) mediated ion transport and that are useful for treating diseases and disorders associated with aberrantly increased CFTR chloride channel activity, such as polycystic kidney disease and secretory diarrheas. The compounds and compositions comprising the compounds described herein may be used for inhibiting expansion or preventing formation of cysts in persons who have polycystic kidney disease.

US Patent:

57846855, Jul 21, 1998

Filed:

Aug 16, 1995

Appl. No.:

8/515567

Inventors:

Thomas H. Stanford - Escondido CA
David W. Snyder - Santee CA
Elden R. Davisson - Poway CA

Assignee:

H.M. Electronics, Inc. - San Diego CA

International Classification:

H04Q 708
H04Q 710

US Classification:

455 312

Abstract:

A base station for interconnecting via a wireless full duplex communication path, a plurality of stationary intercom unit stations with at least one portable transceiver unit. A page channel interface arrangement coupled to the stationary units and the base station interconnects the stationary units and the portable units with a common paging arrangement to enable all the users of the system to be alerted about messages to be transmitted.

US Patent:

60030151, Dec 14, 1999

Filed:

Feb 28, 1996

Appl. No.:

8/608252

Inventors:

Chao Ming Kang - San Diego CA
Thomas H. Stanford - Escondido CA
David W. Snyder - Santee CA

Assignee:

HM Electronics, Inc. - San Diego CA

International Classification:

G06F 1760

US Classification:

705 15

Abstract:

A new and improved video order confirmation method and system that is adapted for use with a point-of-sale terminal and an audio order confirmation station to facilitate customer throughput. The video order confirmation system and method includes a point of sales terminal for receiving order input information from an order taker in response to order requests from a customer, and a video confirmation order terminal to facilitate order confirmation by the customer. The order confirmation terminal includes a free standing terminal housing having a microprocessor and display unit mounted therein for translating order items entered by an order taker at the point-of-sales terminal, into pixel images indicative of the description of the item ordered, the quantity of the item ordered, the unit price of the item ordered, the total price of the item or items ordered, and the accumulated total of all items ordered at any given time during the order process. For the purpose of protecting the display unit from vandalism, the system further includes a remote controlled motorized security shield that covers the display unit during non business hours.

US Patent:

20210242343, Aug 5, 2021

Filed:

Apr 22, 2021

Appl. No.:

17/302060

Inventors:

- Singapore, SG
David Snyder - Beaverton OR, US

Assignee:

Silanna Asia Pte Ltd - Singapore

International Classification:

H01L 29/78
H01L 29/10
H01L 27/06
H01L 29/08

Abstract:

An improved laterally diffused MOSFET (LDMOS) device enables an ability to tune some device parameters independently of other device parameters and/or provides a device architecture with component dimensions that significantly improve device performance. The LDMOS device includes a stepped gate having a first portion with a thin gate insulator over a body region and a second portion with a thick gate insulator over part of a drift region. In some embodiments, a gate shield is disposed over another part of the drift region to reduce a gate-drain capacitance of the LDMOS device. In some embodiments, the LDMOS device has a specific resistance (Rsp) of about 5-8 mOhm*mm, a gate charge (Qg) of about 1.9-2.0 nC/mm, and an Rsp*Qg product figure of merit of about 10-15 mOhm*nC.

US Patent:

20200295185, Sep 17, 2020

Filed:

May 29, 2020

Appl. No.:

16/887776

Inventors:

- Singapore, SG
David Snyder - Beaverton OR, US

Assignee:

Silanna Asia Pte Ltd - Singapore

International Classification:

H01L 29/78
H01L 29/10
H01L 27/06
H01L 29/08

Abstract:

An improved laterally diffused MOSFET (LDMOS) device enables an ability to tune some device parameters independently of other device parameters and/or provides a device architecture with component dimensions that significantly improve device performance. The LDMOS device includes a stepped gate having a first portion with a thin gate insulator over a body region and a second portion with a thick gate insulator over part of a drift region. In some embodiments, a gate shield is disposed over another part of the drift region to reduce a gate-drain capacitance of the LDMOS device. In some embodiments, the LDMOS device has a specific resistance (Rsp) of about 5-8 mOhm*mm, a gate charge (Qg) of about 1.9-2.0 nC/mm, and an Rsp*Qg product figure of merit of about 10-15 mOhm*nC.

US Patent:

20200091340, Mar 19, 2020

Filed:

Sep 13, 2018

Appl. No.:

16/130150

Inventors:

- Singapore, SG
David Snyder - Beaverton OR, US

Assignee:

Silanna Asia Pte Ltd - Singapore

International Classification:

H01L 29/78
H01L 29/10
H01L 29/08
H01L 27/06

Abstract:

An improved laterally diffused MOSFET (LDMOS) device enables an ability to tune some device parameters independently of other device parameters and/or provides a device architecture with component dimensions that significantly improve device performance. The LDMOS device includes a stepped gate having a first portion with a thin gate insulator over a body region and a second portion with a thick gate insulator over part of a drift region. In some embodiments, a gate shield is disposed over another part of the drift region to reduce a gate-drain capacitance of the LDMOS device. In some embodiments, the LDMOS device has a specific resistance (Rsp) of about 5-8 mOhm*mm, a gate charge (Qg) of about 1.9-2.0 nC/mm, and an Rsp*Qg product figure of merit of about 10-15 mOhm*nC.