Deepak P Goyal

age ~52

from Sunnyvale, CA

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Also known as:

Deepak Doyal
William Lee

Phone and address:: 1151 Viscaino Ave, Sunnyvale, CA 94086

Connected to:

Deepak Goyal Phones & Addresses

1151 Viscaino Ave, Sunnyvale, CA 94086
Santa Clara, CA
Smyrna, GA
280 Nob Hill Dr, Elmsford, NY 10523 • 9143474586
81 Nob Hill Dr, Elmsford, NY 10523 • 9143474586
Brooklyn, NY
Jersey City, NJ
Redmond, WA
Atlanta, GA
New York, NY
White Plains, NY

Us Patents

Method For Streaming Xpath Processing With Forward And Backward Axes
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US Patent:

7171407, Jan 30, 2007
Filed:

Oct 3, 2002
Appl. No.:

10/264076
Inventors:

Charles Barton - Haworth NJ, US
Philippe Charles - Millwood NY, US
Deepak Goyal - Elmsford NY, US
Mukund Raghavachari - Ossining NY, US
Assignee:

International Business Machines Corporation - Armonk NY
International Classification:

G06F 17/30
US Classification:

707 4, 707 1, 707 3
Abstract:

A system and method for processing documents, such as XML documents, wherein the method includes the steps of: receiving a query comprising search criteria; receiving at least a portion of a document; modifying the search criteria such that constraints specifying a backward relation may be reformulated into constraints specifying a forward relation; processing the document using the modified criteria; and locating one or more nodes that satisfy the search criteria; and, emitting the selected nodes as output.

Circuit Comparison By Information Loss Matching
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US Patent:

7222317, May 22, 2007
Filed:

Apr 9, 2004
Appl. No.:

10/822166
Inventors:

Anmol Mathur - San Jose CA, US
Deepak Goyal - Santa Clara CA, US
Assignee:

Calypto Designs Systems - Santa Clara CA
International Classification:

G06F 17/50
US Classification:

716 5
Abstract:

The present invention discloses a method and system for computer-aided circuit design for checking the equivalence of data flow graphs by splitting data flow graphs representing finite precision arithmetic circuits into lossless subgraphs representing infinite-precision arithmetic circuits, and edges with information loss. The set of lossless subgraphs generated are leveled, and checked for equivalence as expressions. The edges with information loss are compared by establishing the equivalence of their bit width. The present invention declares data flow graphs as equal, if the respective lossless subgraphs and the bit-width at the corresponding edges with information loss are equal.

Method Of Simplifying A Circuit For Equivalence Checking
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US Patent:

7287235, Oct 23, 2007
Filed:

Aug 6, 2004
Appl. No.:

10/912985
Inventors:

Gagan Hasteer - San Jose CA, US
Deepak Goyal - Santa Clara CA, US
Assignee:

Calypto Design Systems, Inc. - Santa Clara CA
International Classification:

G06F 17/50
H03L 7/06
H03L 7/00
H03H 11/26
US Classification:

716 2, 716 1, 716 3, 716 4, 716 5, 716 6, 703 15, 327158, 327161, 327280
Abstract:

A method of simplifying a logic circuit for enabling cycle-by-cycle equivalence checking is provided. To accomplish this, first, a logic circuit is identified to be a variable delay circuit or a fixed delay circuit. If the logic circuit is a variable delay circuit, it is converted to a fixed delay circuit by using additional circuitry to obtain a fixed delay circuit. If the fixed delay circuit is a logic circuit that performs multiple cycle computations, it is converted to a logic circuit that performs the same computation in a single cycle. Circuit acceleration includes concatenating multiple copies of the fixed delay circuit. After performing circuit acceleration on all sub-circuits in the fixed delay circuit, a combined accelerated circuit is obtained. Thereafter, redundant flip-flops are identified and removed from the combined accelerated circuit and the combined accelerated circuit is optimized.

System, Method And Computer Program Product For Equivalence Checking Between Designs With Sequential Differences
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US Patent:

7350168, Mar 25, 2008
Filed:

May 12, 2005
Appl. No.:

11/129238
Inventors:

Anmol Mathur - San Jose CA, US
Nikhil Sharma - Milpitas CA, US
Deepak Goyal - Santa Clara CA, US
Gagan Hasteer - San Jose CA, US
Rajarshi Mukherjee - San Jose CA, US
Assignee:

Calypto Design Systems, Inc. - Santa Clara CA
International Classification:

G06F 17/50
US Classification:

716 5, 716 6
Abstract:

A system, method and computer program product are provided for equivalency checking between a first design and a second design having sequential differences. To accomplish the equivalency checking, sequential differences between a first design and a second design are identified. It is then determined whether the first design and the second design are equivalent, utilizing the identified sequential differences.

System, Method, And Computer Program Product For Determining Equivalence Of Netlists Utilizing Abstractions And Transformations
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US Patent:

8117571, Feb 14, 2012
Filed:

Oct 29, 2008
Appl. No.:

12/260851
Inventors:

Pankaj P. Chauhan - San Jose CA, US
Deepak Goyal - Sunnyvale CA, US
Anmol Mathur - San Jose CA, US
Assignee:

Calypto Design Systems, Inc. - Santa Clara CA
International Classification:

G06F 17/50
US Classification:

716104, 716111, 716136
Abstract:

A system, method and computer program product are provided for determining equivalence of netlists utilizing at least one transformation. In use, a netlist including a plurality of infinite portions and a plurality of finite portions is identified. Additionally, at least some of the finite portions are transformed, utilizing at least one predetermined transformation. Further, an equivalence of the netlist and another netlist is determined, utilizing at least a subset of the finite portions and the infinite portions. Moreover, an abstraction is performed on the netlist.

System, Method, And Computer Program Product For Determining Equivalence Of Netlists Utilizing At Least One Transformation
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US Patent:

8122401, Feb 21, 2012
Filed:

Oct 29, 2008
Appl. No.:

12/260837
Inventors:

Pankaj P. Chauhan - San Jose CA, US
Deepak Goyal - Sunnyvale CA, US
Anmol Mathur - San Jose CA, US
Assignee:

Calypto Design Systems, Inc. - Santa Clara CA
International Classification:

G06F 17/50
G06F 9/455
US Classification:

716107
Abstract:

A system, method and computer program product are provided for determining equivalence of netlists utilizing at least one transformation. In use, a netlist including a plurality of infinite portions and a plurality of finite portions is identified. Additionally, at least some of the finite portions are transformed, utilizing at least one predetermined transformation. Further, an equivalence of the netlist and another netlist is determined, utilizing at least a subset of the finite portions and the infinite portions. Moreover, the transformation identifies a word-level functionality of the at least some of the finite portions by converting bit-level functionality into word-level functionality.

Name / Title

Company / Classification

Phones & Addresses

Deepak Goyal
Chief Technology Officer

Ezdia Inc
Business Services at Non-Commercial Site

4525 Roderigo Ct, Fremont, CA 94555
8888708744

Deepak Goyal
CEO

RIDHI SIDHI YA ALI MADAD, INC

4401CHAMBLEE Dunwoody Rd #B, Atlanta, GA 30338
4028 Dunwoody Park #B, Atlanta, GA

Deepak Goyal

TULSANA LLC
Custom Computer Programing

10160 Calvert Dr, Cupertino, CA 95014
2518 Brg Hampton Way, Sugar Land, TX 77479
2518 Brg Hampton Way, Sunnyvale, CA 94087
412 Cres Ave, Sunnyvale, CA 94087

Resumes

Deepak Goyal

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Location:

United States

Deepak Goyal

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Location:

United States

Medicine Doctors

Deepak M. Goyal

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Specialties:

Internal Medicine

Education:

Medical School
Gov't Med Coll, Baba Farid Univ Hlth Sci, Patiala, Punjab, India
Graduated: 2001

Description:

Dr. Goyal graduated from the Gov't Med Coll, Baba Farid Univ Hlth Sci, Patiala, Punjab, India in 2001. He works in Glen Ullin, ND and 1 other location and specializes in Internal Medicine. Dr. Goyal is affiliated with Jacobson Memorial Hospital Care Center.