Dennis B Conner

US Patent:

20140051232, Feb 20, 2014

Filed:

Aug 20, 2012

Appl. No.:

13/589985

Inventors:

William F. Burghout - Mesa AZ, US
Dennis Lee Conner - Glendale AZ, US
Michael J. Seddon - Gilbert AZ, US
Jay A. Yoder - Phoenix AZ, US

International Classification:

H01L 21/78

US Classification:

438460, 257E21599

Abstract:

In one embodiment, semiconductor die are singulated from a semiconductor wafer having a backmetal layer by placing the semiconductor wafer onto a carrier tape with the backmetal layer adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the backmetal layer within the singulation lines, and fluid machining the semiconductor wafer to remove the backmetal layer from the singulation lines.

US Patent:

20190385939, Dec 19, 2019

Filed:

Aug 29, 2019

Appl. No.:

16/554980

Inventors:

- Phoenix AZ, US
Jay A. YODER - Phoenix AZ, US
Dennis Lee CONNER - Peoria AZ, US
Frank Robert CERVANTES - Laveen AZ, US
Andrew Celaya - Phoenix AZ, US

Assignee:

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC - Phoenix AZ

International Classification:

H01L 23/498
H01L 21/56
H01L 23/495
H01L 23/31

Abstract:

Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.

US Patent:

20180096925, Apr 5, 2018

Filed:

Dec 6, 2017

Appl. No.:

15/833533

Inventors:

- Phoenix AZ, US
Roger M. Arbuthnot - Mesa AZ, US
Jay A. Yoder - Phoenix AZ, US
Dennis Lee Conner - Glendale AZ, US

Assignee:

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC - Phoenix AZ

International Classification:

H01L 23/498
H01L 21/56
H01L 23/495
H01L 23/31

Abstract:

Implementations of a semiconductor device package may include: a plurality of electrical contacts on a first face of a die, at least one clip electrically and mechanically coupled with at least one electrical contact on a second face of the die where the second face of the die is on an opposing side of the die from the first face of the die. The at least one clip may include at least one lead in electrical communication with the at least one electrical contact on the second face of the die. A mold compound or an encapsulating compound may be included around the die and a majority of the at least one clip where a portion of the at least one lead and a portion of the plurality of electrical contacts on the first face of the die are not overmolded or encapsulated. The semiconductor package includes no lead frame.

US Patent:

20180053712, Feb 22, 2018

Filed:

Aug 18, 2016

Appl. No.:

15/240423

Inventors:

- Phoenix AZ, US
Dennis Lee CONNER - Peoria AZ, US
Jay A. YODER - Phoenix AZ, US

Assignee:

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC - Phoenix AZ

International Classification:

H01L 23/495
H01L 23/00
H01L 21/48

Abstract:

A system, in some embodiments, comprises: a first surface of a lead frame; a second surface of the lead frame, opposite the first surface, said second surface having been etched; and one or more holes passing through said lead frame and coincident with the first and second surfaces, wherein said one or more holes are adapted to control fluid flow on said first surface.

US Patent:

20170110391, Apr 20, 2017

Filed:

Dec 28, 2016

Appl. No.:

15/391960

Inventors:

- Phoenix AZ, US
Roger M. ARBUTHNOT - Mesa AZ, US
Jay A. YODER - Phoenix AZ, US
Dennis Lee CONNER - Glendale AZ, US

Assignee:

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC - Phoenix AZ

International Classification:

H01L 23/498
H01L 23/495
H01L 21/56
H01L 23/31

Abstract:

Implementations of a semiconductor device package may include: a plurality of electrical contacts on a first face of a die, at least one clip electrically and mechanically coupled with at least one electrical contact on a second face of the die where the second face of the die is on an opposing side of the die from the first face of the die. The at least one clip may include at least one lead in electrical communication with the at least one electrical contact on the second face of the die. A mold compound or an encapsulating compound may be included around the die and a majority of the at least one clip where a portion of the at least one lead and a portion of the plurality of electrical contacts on the first face of the die are not overmolded or encapsulated. The semiconductor package includes no lead frame.

US Patent:

20170004965, Jan 5, 2017

Filed:

Sep 16, 2016

Appl. No.:

15/267488

Inventors:

- Phoenix AZ, US
Dennis Lee CONNER - Glendale AZ, US
Michael J. SEDDON - Gilbert AZ, US
Jay A. YODER - Phoenix AZ, US
Gordon M. GRIVNA - Mesa AZ, US

Assignee:

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC - Phoenix AZ

International Classification:

H01L 21/02
H01L 21/78
H01L 21/683
H01L 23/544

Abstract:

In one embodiment, semiconductor die are singulated from a semiconductor wafer having a layer of material by placing the semiconductor wafer onto a carrier tape with the layer of material adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the layer of material within the singulation lines, and separating portions of the layer of material using a fluid.

US Patent:

20160079095, Mar 17, 2016

Filed:

Sep 11, 2014

Appl. No.:

14/484141

Inventors:

- Phoenix AZ, US
Roger M. Arbuthnot - Mesa AZ, US
Jay A. Yoder - Phoenix AZ, US
Dennis Lee Conner - Glendale AZ, US

International Classification:

H01L 21/56

Abstract:

A method of forming a semiconductor device package. Implementations may include providing an adhesive tape; contacting at least one electrical contact of at least one die with an adhesive surface of the adhesive tape; mechanically and electrically coupling at least one clip with the at least one die and contacting an electrical contact of the at least one clip with the adhesive surface; one of overmolding and encapsulating the at least one die and a majority of the at least one clip with one of a mold compound and an encapsulating compound, respectively, wherein the at least one electrical contact of the at least one die and the electrical contact of the at least one clip are not one of overmolded and encapsulated, forming the semiconductor device package; removing the semiconductor device package from the adhesive surface; and including no leadframe in the package.

US Patent:

20150228494, Aug 13, 2015

Filed:

Apr 20, 2015

Appl. No.:

14/690972

Inventors:

- Phoenix AZ, US
Dennis Lee Conner - Glendale AZ, US
Michael J. Seddon - Gilbert AZ, US
Jay A. Yoder - Phoenix AZ, US
Gordon M. Grivna - Mesa AZ, US

Assignee:

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC - Phoenix AZ

International Classification:

H01L 21/304
H01L 21/3065
H01L 21/78

Abstract:

In one embodiment, semiconductor die are singulated from a semiconductor wafer having a backmetal layer by placing the semiconductor wafer onto a carrier tape with the backmetal layer adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the backmetal layer within the singulation lines, and separating portions of the backmetal layer using a fluid.