Dennis E Thompson

US Patent:

D457318, May 21, 2002

Filed:

Oct 4, 2001

Appl. No.:

29/149113

Inventors:

Maureen Borland - LaCanada CA
Diane Fritts - LaCrescenta CA
Todd Miles - Chicago IL
Harold Bennett - St. Joseph MO
Gene Moran - Sierra Madre CA
Dennis Thompson - San Geronimo CA
Michael Galgoci - Coplay PA

Assignee:

Nestec S.A. - Vevey

International Classification:

0301

US Classification:

D 3303

US Patent:

44955650, Jan 22, 1985

Filed:

Nov 9, 1981

Appl. No.:

6/319378

Inventors:

Dennis J. Thompson - Geneva IL

Assignee:

AT&T Bell Laboratories - Murray Hill NJ

International Classification:

G06F 920

US Classification:

364200

Abstract:

An address matcher and process for same used as an aid in debugging computer programs. Each of a plurality of random access memories (RAMs) is addressed by a different subfield of a computer memory address so that each access of the computer memory also causes a read of each of the RAMs. Each RAM is programmed with encoded data to define upper and lower block addresses for that subfield of the computer memory address with which it is associated. An output circuit decodes the encoded data read from each of the RAMs as a result of a computer memory access and generates a signal if the computer memory address lies within the monitored address block.

US Patent:

58191810, Oct 6, 1998

Filed:

Feb 29, 1996

Appl. No.:

8/609076

Inventors:

Michael D. Kotzin - Buffalo Grove IL
Dennis R. Schaeffer - Buffalo Grove IL
John S. Csapo - Glenview IL
Dennis J. Thompson - Geneva IL
Stephen L. Spear - Skokie IL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04B 701
H04B 720

US Classification:

455503

Abstract:

A wireless communication system (200, 300, 400, 500) mitigates the effects of excess timing delay caused by varying lengths of communication paths. In one general implementation, a transition communication path (206, 323, 329) is used to transfer a time-advanced version of a timing reference signal so that the cumulative time delay at a transition cell (209, 325, 331) is reduced. In another general implementation, the timing reference signal is time-advanced in all communication paths (403-411), and selected communication paths (403-407) include a time delay means (423-427, 503-507) such that the cumulative time delay at an area (421) near a target coverage area (130) is reduced. By reducing the cumulative time delay at the area (421) near the target coverage area (130), a handoff of a communication of a mobile station (128) into the target coverage area (130) can be performed.

US Patent:

57677387, Jun 16, 1998

Filed:

Oct 21, 1996

Appl. No.:

8/734225

Inventors:

Tyler A. Brown - Schaumburg IL
Dennis J. Thompson - Geneva IL
Fuyun Ling - Hoffman Estates IL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03D 300
H04L 2722

US Classification:

329304

Abstract:

A receiver (156) includes both a coherent and noncoherent demodulator. When the confidence that estimates of the channel is high, the coherent demodulator is implemented. When the confidence that estimates of the channel is low, the noncoherent demodulator is implemented. A controlling microprocessor (162) controls the selection process and also provides a signal (158) to enable the noncoherent demodulator in instances when noncoherent demodulation would most likely be better than coherent demodulation. As an example, such an instance would be immediately after handoff of a mobile station (505) from a source base-station (503) to a target base-station (502).

US Patent:

44930534, Jan 8, 1985

Filed:

Dec 10, 1982

Appl. No.:

6/448824

Inventors:

Dennis J. Thompson - Geneva IL

Assignee:

AT&T Bell Laboratories - Murray Hill NJ

International Classification:

G06F 100

US Classification:

364900

Abstract:

A synchronous apparatus synchronized to the operation of the slowest device is disclosed, comprising a plurality of devices such as first-in first-out buffer memories (FIFOs) connected to at least one synchronizing mechanism such as a full adder circuit. Each device generates a signal to indicating readiness to operate and a signal indicating completion of operation. Each device receives a signal causing the device to operate and a signal causing the device to stop operating. The synchronizing mechanism generates the operate signal upon sensing the readiness signals of all the devices and continues to generate the operate signal while at least one of the ready signals is sensed. The synchronizing mechanism generates the stop signal upon sensing the completion signal from all of the devices and continues to generate that signal while at least one of the completion signals is sensed.