Donald G Abbott

US Patent:

8039309, Oct 18, 2011

Filed:

May 7, 2008

Appl. No.:

12/116459

Inventors:

Masood Murtuza - Sugar Land TX, US
Satyendra Singh Chauhan - Sugar Land TX, US
Donald C. Abbott - Norton MA, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21/00

US Classification:

438109, 438112, 438113, 438118, 438124, 438127

Abstract:

A method of making integrated circuit packages using a conductive plate as a substrate includes forming a partial circuit pattern on one side of the conductive plate by stamping or selectively removing a portion of the conductive plate through part of its thickness, and then electrically coupling semiconductor dies to the formed patterns on the conductive plate. The method further includes encapsulating at least a portion of the dies and the conductive plate with an encapsulant and removing a portion of the conductive plate from the side opposite the patterned side to form conductive traces based on the formed pattern.