Donato Forlenza

US Patent:

7395469, Jul 1, 2008

Filed:

Apr 8, 2004

Appl. No.:

10/821160

Inventors:

Adrian C. Anderson - Lagrangeville NY, US
Todd Michael Burdine - Wappingers Falls NY, US
Donato Orazio Forlenza - Hopewell Junction NY, US
Orazio Pasquale Forlenza - Hopewell Junction NY, US
William James Hurley - Poughkeepsie NY, US
Phong T. Tran - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/28

US Classification:

714726, 714738

Abstract:

A method, apparatus and computer program product are provided for implementing deterministic based broken scan chain diagnostics. A deterministic test pattern is generated and is loaded into each scan chain in the device under test using lateral insertion via system data ports applying system clocks. Then each scan chain is unloaded and a last switching latch is identified. The testing steps are repeated a selected number of times. Then checking for consistent results is performed. When consistent results are identified, then the identified last switching latch is sent to a Physical Failure Analysis system.

US Patent:

7475308, Jan 6, 2009

Filed:

Apr 11, 2008

Appl. No.:

12/101925

Inventors:

Adrian C. Anderson - Lagrangeville NY, US
Todd Michael Burdine - Wappingers Falls NY, US
Donato Orazio Forlenza - Hopewell Junction NY, US
Orazio Pasquale Forlenza - Hopewell Junction NY, US
William James Hurley - Poughkeepsie NY, US
Phong T. Tran - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/28

US Classification:

714726, 714738

Abstract:

A method, apparatus and computer program product are provided for implementing deterministic based broken scan chain diagnostics. A deterministic test pattern is generated and is loaded into each scan chain in the device under test using lateral insertion via system data ports applying system clocks. Then each scan chain is unloaded and a last switching latch is identified. The testing steps are repeated a selected number of times. Then checking for consistent results is performed. When consistent results are identified, then the identified last switching latch is sent to a Physical Failure Analysis system.