Doufeng Yue - Plano TX, US Noel Russell - Plano TX, US Peijun J. Chen - Dallas TX, US Douglas E. Mercer - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 21/3205
US Classification:
438592, 438652
Abstract:
The present invention provides a method of manufacturing a metal silicide electrode () for a semiconductor device (). The method comprises depositing by physical vapor deposition, germanium atoms () and transition metal atoms () to form a metal-germanium alloy layer () on a semiconductor substrate (). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit ().
Metal-Germanium Physical Vapor Deposition For Semiconductor Device Defect Reduction
Doufeng Yue - Plano TX, US Noel Russell - Plano TX, US Peijun J. Chen - Dallas TX, US Douglas E. Mercer - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 21/3205
US Classification:
438592, 438655, 257E21165
Abstract:
The present invention provides a method of manufacturing a metal silicide electrode () for a semiconductor device (). The method comprises depositing by physical vapor deposition, germanium atoms () and transition metal atoms () to form a metal-germanium alloy layer () on a semiconductor substrate (). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit ().
Multi-Thickness Oxide Growth With In-Situ Scanned Laser Heating
Aditi D. Banerjee - Plano TX Douglas E. Mercer - Richardson TX Rick L. Wise - Plano TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 2131 H01L 21469 H01L 21336
US Classification:
438766
Abstract:
An embodiment of the instant invention is a method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a doped polycrystalline silicon layer insulatively disposed over the semiconductor substrate; and subjecting the doped polycrystalline silicon layer to a temperature of around 700 to 1100 C. in an oxidizing ambient for a period of around 5 to 120 seconds. Preferably, the oxidizing ambient is comprised of: O. sub. 2,O. sub. 3, NO, N. sub. 2 O, H. sub. 2 O, and any combination thereof. The temperature is, preferably, around 950 to 1050 C. (more preferably around 1000 C. ). The step of subjecting the doped polycrystalline silicon layer to a temperature of around 700 to 1100 C. in an oxidizing ambient for a period of around 5 to 120 seconds, preferably, forms an oxide layer on the polycrystalline silicon layer, which has a thickness which is, preferably, greater than the thickness of a native oxide layer. More preferably, it has a thickness which is greater than 3 nm (more preferably greater than 2 nm).