Edward L Yankowski

US Patent:

20030004066, Jan 2, 2003

Filed:

Jun 29, 2001

Appl. No.:

09/895650

Inventors:

Sushumna Iruvanti - Wappingers Falls NY, US
Edward Yankowski - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01C001/00
H01B001/00

US Classification:

505/100000, 252/500000

Abstract:

A thermal paste for low temperature applications made from a combination of a thermally conducting solid filler, dispersant and linear alkylbenzene carrier. The thermal paste may be applied to an electronic component to increase the cooling of the electronic component.

US Patent:

49148141, Apr 10, 1990

Filed:

May 4, 1989

Appl. No.:

7/347305

Inventors:

John R. Behun - Poughkeepsie NY
William R. Miller - Poughkeepsie NY
Bert H. Newman - Carmel NY
Edward L. Yankowski - Hyde Park NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01R 909

US Classification:

29843

Abstract:

A low cost process for fabricating solder column interconnectons for an electronic package is described. The process includes the step of filling an array of pin holes in a pin mold with a lead/tin solder, which array of pin holes is in substantial registration with the array of conductive pads on one side of a chip carrier; heating the lead/tin solder in the pin mold such that the solder becomes molten and coalesces with the array of conductive pads of the chip carrier, thereby forming an array of miniature pins bonded to the array of conductive pads of the chip carrier; joining circuit components to the other side of the chip carrier; and reflowing an eutectic lead/tin solder paste screened to the corresponding array of conductive pads of a circuit board to bond the free ends of the array of miniature pins of the carrier to the corresponding array of conductive pads, thereby forming the solder column connnections between the chip carrier and the circuit board. The process is suitable for mass production of reliable, high-density electrical interconnections between a chip carrier and a supporting circuit board.