Edwin Glenn Yancey

US Patent:

6608900, Aug 19, 2003

Filed:

Oct 1, 1998

Appl. No.:

09/164495

Inventors:

Edwin Glenn Yancey - Burleson TX
Leroy S. Baker - Colleyville TX
William I. H. Chen - Bedford TX

Assignee:

Marconi Communications, Inc. - Cleveland OH

International Classification:

H04M 1900

US Classification:

379413, 307 39, 307 41

Abstract:

A load management system for monitoring the output from a power supply and managing the load on said power supply, said load management system comprising a hysteresis circuit for signaling a load element to stop drawing current when an output voltage at said output falls below a first threshold and for signaling said load element to resume drawing current when said output voltage rises above a second threshold, said hysteresis circuit comprising a first state sensing circuit having an input coupled to said output and for signaling whether said output voltage is greater than or less than said first voltage threshold, a second state sensing circuit having an input coupled to said output and for signaling whether said output voltage is greater than or less than a second voltage threshold, and a state transition circuit having a first input coupled to the output of said first state sensing circuit and a second input coupled to the output of said second state sensing circuit, said state transition circuit having an output for setting a first control signal to a first state when said output voltage falls below said first threshold and resetting said first control signal to a second state when said output voltage rises above said second threshold.

US Patent:

8237459, Aug 7, 2012

Filed:

Aug 28, 2008

Appl. No.:

12/200446

Inventors:

Ewan G. Browne - Dallas TX, US
Wayne Jacob Chappell - Arlington TX, US
Paul R. Siglinger - Fort Worth TX, US
William Cory Wood - Fort Worth TX, US
Edwin Glenn Yancey - Burleson TX, US

Assignee:

Greenlee Textron Inc. - Rockford IL

International Classification:

G01R 27/08

US Classification:

324715, 324691, 324724

Abstract:

A fall of potential method of determining earth ground resistance which utilizes an earth ground tester and eliminates the need for utilizing removable ground stakes. Rather than utilizing a “far stake” the method provides connection of the earth ground tester to the telephone wires. Rather than utilizing a “near stake” the method provides for connection of the earth ground tester to the cable shield.

US Patent:

20090102490, Apr 23, 2009

Filed:

Oct 17, 2008

Appl. No.:

12/253595

Inventors:

Curtis Clifford Taylor - Dallas TX, US
Edwin Glenn Yancey - Burleson TX, US

International Classification:

G01R 29/26

US Classification:

324613

Abstract:

The present invention provides a circuit for performing a stress test on a paired line. The circuit provides for first and second balanced outlet pathways for applying an AC signals to the paired line. Although each of these first and second balanced outlet pathways include balanced capacitors, the need to vet these capacitors in order to achieve proper operation of the circuit is eliminated.

US Patent:

61512265, Nov 21, 2000

Filed:

May 5, 1999

Appl. No.:

9/305637

Inventors:

William I. H. Chen - Bedford TX
Edwin Glenn Yancey - Burleson TX
Mahlon Danny Kimbrough - Bedford TX

Assignee:

Marconi Communications, Inc. - Cleveland OH

International Classification:

H02M 3335
H02M 7538

US Classification:

363 26

Abstract:

A four quadrant power conversion topology comprising a multi-winding inductor, four switches, and four diodes is disclosed. The four quadrant power conversion is utilized in a number of power conversion devices such as a power efficient non-linear power amplifier that comprises the 4Q power conversion topology of the present invention and a switch-control-signal generator coupled to the 4Q power conversion topology. The switch-control-signal generator generates switch activation signals for driving the four switches of the 4Q power conversion topology. In one embodiment the switch-control-signal generator comprises a polarity detector for detecting the polarity of an input signal, a full wave rectifier for rectifying the input signal, a pulse width modulator which produces a pulse width modulated signal representative of the full wave rectified input signal, and steering logic that generates switch activation signals for driving the power conversion topology to produce an output representative of the input signal. The amplifier may optionally include switch drivers to condition the switch activation signals to drive the switches in the 4Q power conversion topology.