Elizabeth G Jacobs

US Patent:

6580170, Jun 17, 2003

Filed:

Jun 2, 2001

Appl. No.:

09/873058

Inventors:

Leland S. Swanson - McKinney TX
Elizabeth G. Jacobs - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2348

US Classification:

257753, 257643, 257723, 257725, 438402, 438424, 438433, 438473

Abstract:

An integrated circuit device with a low stress, thin film, protective overcoat having enhanced adhesion both to polymeric materials used in packaging semiconductor devices, and within the passivating film layers, including the following sequence of materials deposited by PECVD processing: a thin film of silicon dioxide, a layer of silicon nitride, oxy-nitride or silicon carbide, and a very thin topmost layer of silicon oxide.

US Patent:

6730541, May 4, 2004

Filed:

Nov 5, 1998

Appl. No.:

09/186973

Inventors:

Katherine G. Heinen - Dallas TX
Darvin R. Edwards - Garland TX
Elizabeth G. Jacobs - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2160

US Classification:

438108

Abstract:

A wafer-scale assembly apparatus for integrated circuits and a method for forming the wafer-scale assembly are disclosed. A semiconductor wafer including a plurality of circuits is provided with a plurality of metal contact pads as electrical entry and exit ports. A first wafer-scale patterned polymer film carrying solder balls for each of the contact pads on the wafer is positioned opposite the wafer, and the wafer and the film are aligned. The film is brought into contact with the wafer. Radiant energy in the near infrared spectrum is applied to the backside of the wafer, heating the wafer uniformly and rapidly without moving the semiconductor wafer. Thermal energy is transferred through the wafer to the surface of the wafer and into the solder balls, which reflow onto the contact pads, while the thermal stretching of the polymer film is mechanically compensated. The uniformity of the height of the liquid solder balls is controlled either by mechanical stoppers or by the precision linear motion of motors. After cooling, the solder balls solidify and the first polymer film is removed.

US Patent:

6787397, Sep 7, 2004

Filed:

Apr 29, 2003

Appl. No.:

10/426451

Inventors:

Leland S. Swanson - McKinney TX
Elizabeth G. Jacobs - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2144

US Classification:

438118, 438261, 438761, 438762, 438763, 257316

Abstract:

An integrated circuit device with a low stress, thin film, protective overcoat having enhanced adhesion both to polymeric materials used in packaging-semiconductor devices, and within the passivating film layers, including the following sequence of materials deposited by PECVD processing: a thin film of silicon dioxide, a layer of silicon nitride, oxy-nitride or silicon carbide, and a very thin topmost layer of silicon oxide.

US Patent:

60965789, Aug 1, 2000

Filed:

Jan 21, 1999

Appl. No.:

9/234689

Inventors:

Elizabeth G. Jacobs - Richardson TX
Katherine G. Heinen - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2144

US Classification:

438118

Abstract:

An integrated circuit package (10, 40) may comprise an integrated circuit chip (12, 42) and a substrate (14, 44) opposite the chip (12, 42). A connector (20, 52) may be disposed between the chip (12, 42) and the substrate (14, 44) to electrically couple the chip (12, 42) and the substrate (14, 44). A matrix (24, 50) may be disposed about the connector (20, 52). The matrix (24, 50) may comprise a blend of liquid crystal polymer and thermoplastic polymer. The matrix (24, 50) may have a coefficient of thermal expansion in a direction (26, 56) substantially parallel to the chip (12, 42) and the substrate (14, 44) that is greater than that of the chip (12, 42) and that is less than that of the substrate (14, 44) in the substantially parallel direction (26, 56). In a direction (28, 58) normal to the substantially parallel direction (26, 56), the matrix (24, 50) may have a coefficient of thermal expansion that is approximately that of the connector (20, 52).

US Patent:

58941738, Apr 13, 1999

Filed:

Nov 5, 1997

Appl. No.:

8/964513

Inventors:

Elizabeth G. Jacobs - Richardson TX
Katherine G. Heinen - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2329
H01L 2348
H01L 2352
H01L 2940

US Classification:

257790

Abstract:

An integrated circuit package (10, 40) may comprise an integrated circuit chip (12, 42) and a substrate (14, 44) opposite the chip (12, 42). A connector (20, 52) may be disposed between the chip (12, 42) and the substrate (14, 44) to electrically couple the chip (12, 42) and the substrate (14, 44). A matrix (24, 50) may be disposed about the connector (20, 52). The matrix (24, 50) may comprise a blend of liquid crystal polymer and thermoplastic polymer. The matrix (24, 50) may have a coefficient of thermal expansion in a direction (26, 56) substantially parallel to the chip (12, 42) and the substrate (14, 44) that is greater than that of the chip (12, 42) and that is less than that of the substrate (14, 44) in the substantially parallel direction (26, 56). In a direction (28, 58) normal to the substantially parallel direction (26, 56), the matrix (24, 50) may have a coefficient of thermal expansion that is approximately that of the connector (20, 52).