Elizabeth P May

US Patent:

8139700, Mar 20, 2012

Filed:

Jun 26, 2009

Appl. No.:

12/492419

Inventors:

Troy J. Beukema - Yorktown Heights NY, US
Steven M. Clements - Research Triangle Park NC, US
Chun-Ming Hsu - Hopewell Junction NY, US
William R. Kelly - Hopewell Junction NY, US
Elizabeth M. May - Research Triangle Park NC, US
Sergey V. Rylov - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 25/00

US Classification:

375371, 375376, 327147, 327153

Abstract:

A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.