Eric Timothy Robbins

US Patent:

6365839, Apr 2, 2002

Filed:

Jun 5, 2000

Appl. No.:

09/587307

Inventors:

Eric F. Robbins - Merrimack NH
Stephen W. Berry - Littleton MA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

H05K 103

US Classification:

174255, 174 36, 361780, 361792, 361794, 361795

Abstract:

A multi-layer printed circuit board provides at least two sections thereon. One section has a grouping of high-impedance traces and another adjacent section, separated by a dividing line, has a mainly low-impedance signal traces. The high-impedance section has at least one of a ground and power plane separated from a grouping of central layers, containing the high-impedance traces, by at least one empty or âvoidâ layer. The void layer is likewise filled by the ground and power planes in the within low-impedance section by stepping the ground/power plane inwardly toward the central layers while providing another low-impedance signal trace in the layer above and below the respective ground and power planes. In a preferred embodiment there are at least nine layers of circuit board material with high-impedance traces on a central grouping of at least three central board layers with three layers disposed respectively above and below the central board layers.