Ernest S Walker

US Patent:

6374379, Apr 16, 2002

Filed:

Feb 5, 1999

Appl. No.:

09/245519

Inventors:

Ernest P. Walker - Weston MA
Ronald A. Sartschev - Dunstable MA
Eric D. Blom - Wakefield MA

Assignee:

Teradyne, Inc. - Boston MA

International Classification:

G01R 3128

US Classification:

714724, 324763

Abstract:

Pin slice circuitry used in automatic test equipment is disclosed. The pin slice circuitry includes a portion implemented using CMOS technology and a portion implemented using bipolar technology. The CMOS portion includes a plurality of timing generator circuits, digital sigma delta modulator circuitry used to generate digital bit streams representative of analog reference levels, and programmable digital signal processing circuitry. The bipolar portion includes driver/receiver channels, a parametric measurement unit, and decoder circuitry, which produces the analog reference levels from the digital bit streams generated by the modulator circuitry. The analog reference levels are used by the driver/receiver channels and the parametric measurement unit; and, the digital signal processing circuitry is used to monitor and control levels produced by the parametric measurement unit. The disclosed pin slice circuitry has the advantages of reduced size and cost as compared with conventional pin slice circuitry.

US Patent:

7023366, Apr 4, 2006

Filed:

May 25, 2005

Appl. No.:

11/137240

Inventors:

Ernest Walker - Weston MA, US
Ronald A. Sartschev - Dunstable MA, US

Assignee:

Teradyne, Inc. - Boston MA

International Classification:

H03M 1/10

US Classification:

341120, 341118

Abstract:

In one aspect, the invention is an integrated circuit (IC) for use in testing an analog-to-digital (ADC) converter includes a first channel of a parametric measurement unit (PMU) configured to send a force signal to the ADC. The IC also includes a first digital-to-analog converter (DAC) connected to the first channel of the PMU. The DAC has a DC level of accuracy of less than 1 millivolt. In another aspect, the invention is an integrated circuit (IC) for use in testing a digital-to-analog-converter-device-under-test (DACDUT). The IC includes a first channel of a parametric measurement unit (PMU) configured to send a force signal to the DACDUT and including an output port for taking measurements, a first digital-to-analog converter (DAC) connected to the first channel of the PMU and a PMU measurement path connected to the output port having a DC level of accuracy of less than 1 mV.

US Patent:

7102375, Sep 5, 2006

Filed:

Dec 23, 2004

Appl. No.:

11/023023

Inventors:

Ernest Walker - Weston MA, US
Ronald A. Sartschev - Dunstable MA, US

Assignee:

Teradyne, Inc. - Boston MA

International Classification:

G01R 31/02

US Classification:

324761, 324765, 3241581, 714724, 714733

Abstract:

In one aspect, the invention is an integrated circuit (IC) for use in testing a device. The IC includes a pin electronics (PE) driver having an output and a pin. The IC also includes a buffer connected to the output of the PE driver and the pin. The first voltage measured at the pin is greater than a second voltage measured at the output. The IC may include a first amplifier having an input connected to a voltage source. The IC may also include a second amplifier having an input connected to the output of the PE driver.

US Patent:

7135881, Nov 14, 2006

Filed:

Dec 21, 2004

Appl. No.:

11/018626

Inventors:

Ernest Walker - Weston MA, US
Ronald A. Sartschev - Dunstable MA, US

Assignee:

Teradyne, Inc. - Boston MA

International Classification:

G01R 31/26

US Classification:

324765, 324 731, 3241581

Abstract:

A method of and system for producing signals to test semiconductor devices includes a pin electronic (PE) stage for providing a parametric measurement unit (PMU) current test signal to a semiconductor device under test. The PE stage also senses a response from the semiconductor device under test.

US Patent:

7256600, Aug 14, 2007

Filed:

Dec 21, 2004

Appl. No.:

11/018540

Inventors:

Ernest Walker - Weston MA, US
Ronald A. Sartschev - Dunstable MA, US

Assignee:

Teradyne, Inc. - North Reading MA

International Classification:

G01R 31/02

US Classification:

324763, 324765, 324 731, 714733

Abstract:

A semiconductor device tester includes a parametric measurement unit (PMU) stage for producing a DC test signal and a pin electronics (PE) stage for producing an AC test signal to test a semiconductor device. A driver circuit is capable of providing a version of the DC test signal and a version of the AC test signal to the semiconductor device.

US Patent:

7271610, Sep 18, 2007

Filed:

Dec 17, 2004

Appl. No.:

11/016354

Inventors:

Ernest Walker - Weston MA, US
Ron Sartschev - Dunstable MA, US

Assignee:

Teradyne, Inc. - North Reading MA

International Classification:

G01R 31/28

US Classification:

324765, 3241581

Abstract:

Circuitry for use in testing a device includes a first measurement unit to apply a forced voltage to the device, and a second measurement unit having functionality that is disabled. The second measurement unit includes a sense path to receive a sensed voltage from the device, where the sense path connects to the first measurement unit through the second measurement unit. The first measurement unit adjusts the forced voltage based on the sensed voltage.

US Patent:

7403030, Jul 22, 2008

Filed:

Dec 17, 2004

Appl. No.:

11/016352

Inventors:

Ernest Walker - Weston MA, US
Ron Sartschev - Dunstable MA, US

Assignee:

Teradyne, Inc. - North Reading MA

International Classification:

G01R 31/26

US Classification:

324765, 3241581

Abstract:

An apparatus for providing current to a device under test includes a first parametric measurement unit configured to provide current to the device, and a second parametric measurement unit configured to provide current to the device. The current from the second parametric measurement unit augments the current from the first parametric measurement unit at the device.

US Patent:

7508228, Mar 24, 2009

Filed:

Dec 21, 2005

Appl. No.:

11/321288

Inventors:

Ernest P. Walker - Weston MA, US
Ronald A. Sartschev - Dunstable MA, US

Assignee:

Teradyne, Inc. - North Reading MA

International Classification:

G01R 31/26

US Classification:

324765, 3241581

Abstract:

A semiconductor device tester includes a parametric measurement unit (PMU) driver circuit that provides a DC test signal for testing a semiconductor device, and a feedback circuit that senses the DC test signal at an output of the PMU driver circuit and sends the sensed DC test signal to an input of the PMU driver circuit for compensating the DC test signal.