Erwin A Tate

US Patent:

50420348, Aug 20, 1991

Filed:

Oct 27, 1989

Appl. No.:

7/427549

Inventors:

Anthony Correale - Raleigh NC
Richard M. Doney - Durham NC
Kim E. O'Donnell - Raleigh NC
Andrew Kegl - Raleigh NC
Erwin A. Tate - Raleigh NC
David M. Wu - Melbourne FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1100
G01R 3128

US Classification:

371 223

Abstract:

The present invention implements self testable boundary logic by using a tristate pass gate and a tristate receiver in combination with a linear feedback shift register, a storage register, and level sensitive scan design (LSSD) techniques. The linear feedback shift register (LFSR) shifts data into a storage register which is connected to the data inputs of the boundary logic through the tristate pass gate. The outputs of the tristate input receiver are also connected to the inputs of the boundary logic so that the boundary logic can receive data from both the data input of the integrated circuit (data path) or from the storage register connected to the LFSR. The tristate pass gate and receiver are enabled through a self test signal such that when the pass gate is enabled the receiver is not enabled and vice versa. In this way the boundary logic can only get data from either the storage register or through the receiver but not both. In this configuration data from the storage register can be input into the boundary logic without going through a multiplexer in the data path and incurring the associated delay.