Esam L Elashmawi

US Patent:

51262827, Jun 30, 1992

Filed:

May 16, 1990

Appl. No.:

7/523978

Inventors:

Steve S. Chiang - Saratoga CA
Esam Elashmawi - San Jose CA
Theodore M. Speers - San Leandro CA
LeRoy Winemberg - Fremont CA

Assignee:

Actel Corporation - Sunnyvale CA

International Classification:

H01L 21326
H01L 2170

US Classification:

437172

Abstract:

An already- programmed anti-fuse is DC soaked by passing DC current through the anti-fuse from a DC voltage source applied across the electrodes of the anti-fuse. The anti-fuse resistance is lower when the DC voltage being applied such that the positive end of the voltage source is applied to the electrode having the higher arsenic concentration. An already programmed anti-fuse is AC soaked, by passing alternating current pulses through the anti-fuse from an AC voltage source applied across the anti-fuse electrodes. This AC soak may even be applied following the controlled polarity DC soak disclosed herein. The AC soaked anti-fuse resistance is even lower than DC soaked anti-fuse under the same soak current level.

US Patent:

54499470, Sep 12, 1995

Filed:

Jul 7, 1993

Appl. No.:

8/088298

Inventors:

Steve S. Chiang - Saratoga CA
Esam Elashmawi - San Jose CA

Assignee:

Actel Corporation - Sunnyvale CA

International Classification:

H01L 2702

US Classification:

257530

Abstract:

A "read-disturb" resistant metal-to-metal antifuse includes a lower electrode comprising a first metal layer in a microcircuit structure. An inter-metal dielectric is disposed over the lower electrode and includes an antifuse aperture disposed therein. A first layer of antifuse material is disposed over exposed surface of the lower electrode in the antifuse aperture. A highly conductive layer is disposed over the first region of antifuse material and a second layer of antifuse material is disposed over the highly conductive layer. An upper electrode comprises a second metal layer disposed over the second layer of antifuse material. The first and second layers of antifuse material may comprise single-layer or multi-layer dielectric materials, amorphous silicon, or combinations of these materials. A process for fabricating a read-disturb resistant metal-to-metal antifuse comprises the steps of forming a lower electrode comprising a portion of a first metal layer in a microcircuit structure; forming an inter-metal dielectric layer over the lower electrode; forming an antifuse aperture in the inter-metal dielectric layer to expose the upper surface of the lower electrode; forming a first layer of antifuse material over the exposed surface of the lower electrode in the antifuse aperture; forming a highly conductive layer over the first layer of antifuse material; forming a second layer of antifuse material over the highly conductive layer; and forming an upper electrode comprising a second metal layer over the second layer of antifuse material.

US Patent:

53169719, May 31, 1994

Filed:

Sep 18, 1992

Appl. No.:

7/947103

Inventors:

Steve S. Chiang - Saratoga CA
Esam Elashmawi - San Jose CA

Assignee:

Actel Corporation - Sunnyvale CA

International Classification:

H01L 2114
H01L 21306
H01L 21326
H01L 21465

US Classification:

437170

Abstract:

A method for programming antifuses having at least one metal electrode includes the steps of providing an antifuse programming voltage source, capable of supplying alternating positive and negative programming voltage pulses; providing a programming path from the antifuse programming voltage source to the antifuse; and providing a selected number of alternating positive and negative programming voltage pulses to the antifuse through the programming path.