Eugene A Delarosa

US Patent:

6472123, Oct 29, 2002

Filed:

May 15, 2000

Appl. No.:

09/571719

Inventors:

Eugene A. DeLaRosa - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G03C 500

US Classification:

430311, 430 5, 430312, 430322, 430394

Abstract:

A multiple pass write method and a reticle made from the method are described. A reticle preform is provided including a transparent substrate, a metal layer, and a layer of a photoresist material. In a first write pass, a first portion of the photoresist material is exposed by an electron beam device. Then, in a second write pass, a second portion of the photoresist material is exposed. The first exposed portion is smaller or has finer dimensions than the second exposed portion. The exposed portions of photoresist material are removed, and the unexposed portions of photoresist serve as a mask. The uncovered portions of the conductive layer are etched. Further, the unexposed portions of the photoresist material are removed, creating a reticle through a multiple write pass strategy.

US Patent:

6642530, Nov 4, 2003

Filed:

Oct 3, 2001

Appl. No.:

09/968955

Inventors:

Eugene A. DeLaRosa - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G03C 500

US Classification:

2504922, 2504923

Abstract:

A multiple pass write method and a reticle made from the method are described. A reticle preform is provided including a transparent substrate, a metal layer, and a layer of a photoresist material. In a first write pass, a first portion of the photoresist material is exposed by an electron beam device. Then, in a second write pass, a second portion of the photoresist material is exposed. The first exposed portion is smaller or has finer dimensions than the second exposed portion. The exposed portions of photoresist material are removed, and the unexposed portions of photoresist serve as a mask. The uncovered portions of the conductive layer are etched. Further, the unexposed portions of the photoresist material are removed, creating a reticle through a multiple write pass strategy.

US Patent:

6713233, Mar 30, 2004

Filed:

Oct 18, 2002

Appl. No.:

10/272976

Inventors:

Eugene A. DeLaRosa - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G03F 900

US Classification:

430311, 430 5

Abstract:

A multiple pass write method and a reticle made from the method are described. A reticle preform is provided including a transparent substrate, a metal layer, and a layer of a photoresist material. In a first write pass, a first portion of the photoresist material is exposed by an electron beam device. Then, in a second write pass, a second portion of the photoresist material is exposed. The first exposed portion is smaller or has finer dimensions than the second exposed portion. The exposed portions of photoresist material are removed, and the unexposed portions of photoresist serve as a mask. The uncovered portions of the conductive layer are etched. Further, the unexposed portions of the photoresist material are removed, creating a reticle through a multiple write pass strategy.

US Patent:

6818910, Nov 16, 2004

Filed:

Aug 23, 2002

Appl. No.:

10/226414

Inventors:

William A. Stanton - Boise ID
Eugene A DeLaRosa - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G21K 510

US Classification:

25049222, 2504921, 2504922, 2504923

Abstract:

The present invention is generally directed to various reticle writing methodologies to reduce write time, and a system for performing same. In one illustrative embodiment, the method comprises exposing a layer of photoresist in accordance with a first writing pattern in a first area of the layer of photoresist and exposing the layer of photoresist in accordance with a second writing pattern in a second area of the layer of photoresist, the first and second areas of the layer of photoresist overlapping one another in at least one region. In another illustrative embodiment, the method comprises creating a collection of digital data corresponding to a desired pattern for a reticle and separating the collection of digital data into at least two separate groups of data, a first of the data groups being used to define a first writing pattern for the reticle, a second of the data groups being used to define a second writing pattern for the reticle, wherein the first and second writing patterns overlap one another in at least one region. In yet another illustrative embodiment, the method comprises forming a layer of photoresist above at least one of a semiconducting substrate and a process layer, exposing the layer of photoresist in accordance with a first writing pattern in a first area of the layer of photoresist, and exposing the layer of photoresist in accordance with a second writing pattern in a second area of the layer of photoresist, wherein the first and second areas overlap one another in at least one region.

US Patent:

7095885, Aug 22, 2006

Filed:

Mar 1, 2000

Appl. No.:

09/516581

Inventors:

Eugene A. DeLaRosa - Boise ID, US
Troy V. Gugel - Meridian ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06K 9/00

US Classification:

382151, 348 86, 435 7

Abstract:

A method and apparatus for measuring registration between two or more integrated circuit layers is disclosed. Images of actual operative circuitry of different layers of a semiconductor wafer, obtained by an optical technique or a scanning electron microscope, are digitized and analyzed for the relative placement of pattern shapes of the corresponding layers. This relative placement is then compared to tolerance values and if out of tolerance misregistration of the two layers is indicated.

US Patent:

20060274935, Dec 7, 2006

Filed:

Aug 15, 2006

Appl. No.:

11/504072

Inventors:

Eugene DeLaRosa - Boise ID, US
Troy Gugel - Meridian ID, US

International Classification:

G06K 9/00

US Classification:

382151000

Abstract:

A method and apparatus for measuring registration between two or more integrated circuit layers is disclosed. Images of actual operative circuitry of different layers of a semiconductor wafer, obtained by an optical technique or a scanning electron microscope, are digitized and analyzed for the relative placement of pattern shapes of the corresponding layers. This relative placement is then compared to tolerance values and if out of tolerance misregistration of the two layers is indicated.

US Patent:

20070019859, Jan 25, 2007

Filed:

Jun 5, 2006

Appl. No.:

11/446145

Inventors:

Eugene DeLaRosa - Boise ID, US
Troy Gugel - Meridian ID, US

International Classification:

G06K 9/00

US Classification:

382151000

Abstract:

A method and apparatus for measuring registration between two or more integrated circuit layers is disclosed. Images of actual operative circuitry of different layers of a semiconductor wafer, obtained by optical or scanning electron microscopy, are digitized and analyzed for the relative placement of pattern shapes of the corresponding layers. This relative placement is then compared to a predetermined database and the registration calculated.

US Patent:

50499254, Sep 17, 1991

Filed:

Apr 20, 1990

Appl. No.:

7/511272

Inventors:

John Aiton - Boise ID
Patrick W. Vaughn - Caldwell ID
Eugene DeLarosa - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G03B 2742

US Classification:

355 53

Abstract:

A reticle for use in a wafer stepper of the type in which a lens projects the image of a mask to create a lithographically-defined pattern on a wafer. The reticle includes a plurality of parallel, opaque rectangles formed therein. The rectangles are uniform in size with the width of each rectangle bearing a ratio to the distance between adjacent rectangles of approximately 4:1.

Address:

11678 W Oneida Dr, Boise, ID 83709

Phone:

2083620493

VIN:

JTEEW21A970039487

Make:

TOYOTA

Model:

HIGHLANDER HYBRID

Year:

2007