Forrest A. Edwards - Wilsonville OR Eric P. Etheridge - Beaverton OR
Assignee:
Tektronix, Inc. - Beaverton OR
International Classification:
H03M 120
US Classification:
341131, 341139
Abstract:
The subject invention addresses the problem of aliasing in subsampled data by adding dither to the timing of the subsampling of the data. The subject invention solves a speed problem caused by delays in modifying (i. e. , dithering) the A/D converter sampling clock. It is herein recognized that to maintain a high acquisition rate one should randomly select (i. e. , dither) samples after demultiplexing the data into a wider and slower stream of samples, rather than attempting to modify the high speed A/D converter sampling clock.
Architecture Providing Increased Information Display For Long Acquisitions Or Constrained Memory Bandwidth
Eric P. Etheridge - Beaverton OR, US Kevin T. Ivers - Woodland WA, US Forrest A. Edwards - Wilsonville OR, US Paul M. Gerlach - Beaverton OR, US
Assignee:
Tektronix, Inc. - Beaverton OR
International Classification:
G01R 1300 G06F 1500
US Classification:
702 67, 702 70
Abstract:
A method and apparatus for rasterizing a digital sample stream by producing histograms for each of a plurality of time slices forming a display frame. Time slice histograms for at least one display frame are stored in a circular memory buffer and provided to a display raster for display. The first time slice displayed optionally comprises that time slice temporally associated with a trigger condition.