Frank M Murden

US Patent:

7652611, Jan 26, 2010

Filed:

May 20, 2008

Appl. No.:

12/123908

Inventors:

Michael Elliott - Summerfield NC, US
Frank Murden - Roan Mountain TN, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03M 1/38

US Classification:

341161, 341162, 341172

Abstract:

Embodiments of the present invention provide a pipeline ADC front-end sampling structure that provides a continuous time input signal to a flash comparator for sampling. By providing a continuous time input signal to the flash comparator, no delay is introduced from the need to transfer a DC charge representing the sampled input to the flash comparator. Matching sampling networks in the residual generator and the flash comparator are avoided due to the high bandwidth response requirements of the residual generator and the flash comparator when operating on high frequency input signals.

US Patent:

20200244279, Jul 30, 2020

Filed:

Jan 22, 2020

Appl. No.:

16/749965

Inventors:

- Norwood MA, US
Frank Murden - Roan Mountain TN, US
Peter Delos - Greensboro NC, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03M 1/12
H03K 5/14

Abstract:

An ultra-wideband distributed ADC can be cascaded to build high performance radio frequency (RF) analog electronics integrated with advanced digital complementary metal-oxide-semiconductor (CMOS) electronics on the same wafer. Advantages can include wide spectral coverage, high resolution, large dynamic range, and high information processing bandwidth. Part of an overall system includes a precise, programmable, real-time delay circuit that can achieve picosecond accuracy.

US Patent:

20200195265, Jun 18, 2020

Filed:

Feb 19, 2020

Appl. No.:

16/795503

Inventors:

- Norwood MA, US
Frank MURDEN - Roan Mountain TN, US
Peter DELOS - Greensboro NC, US
Ralph D. MOORE - Greensboro NC, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03M 1/00
H03M 1/06
H03M 1/12
H03M 1/10
H03H 7/42

Abstract:

Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.

US Patent:

20190173481, Jun 6, 2019

Filed:

Nov 16, 2018

Appl. No.:

16/193202

Inventors:

- Norwood MA, US
Frank Murden - Roan Mountain TN, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03M 1/10

Abstract:

A multi-input analog-to-digital converter (ADC), i.e., a single ADC, can receive multiple analog input signals and generate multiple digital outputs. To combine multiple analog input signals into a single multi-input ADC, the multi-input ADC would typically include multiple track and hold (T/H) circuits and an adder, which can consume a significant amount of power and incur large cost overhead. An improved approach is to combine multiple inputs through a unique T/H circuit in the front-end of the ADC. The multiple analog input signals can be aggregated using code sequences, without requiring a significant amount of external circuits.