Fred S Chen

US Patent:

6942958, Sep 13, 2005

Filed:

Nov 7, 2003

Appl. No.:

10/703832

Inventors:

Fred Chen - Cupertino CA, US
Jeff Farnsworth - Los Gatos CA, US
Wen-hao Cheng - Fremont CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G03F009/00

US Classification:

430311, 430394

Abstract:

A mask having a pattern to modify a circuitry feature that has been exposed in a radiation sensitive layer by transmitting modifying radiation to a region of the radiation sensitive layer containing the exposed circuitry feature is described. The mask may reduce subwavelength distortions and proximity effect distortions of the exposed circuitry feature. The mask may be used to manufacture a semiconductor device having circuitry that is based on the modified circuitry feature.

US Patent:

7014956, Mar 21, 2006

Filed:

Jan 4, 2002

Appl. No.:

10/040772

Inventors:

Fred Chen - Cupertino CA, US
Jeff Farnsworth - Los Gatos CA, US
Wen-hao Cheng - Fremont CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G03F 9/00

US Classification:

430 5

Abstract:

A mask having a pattern to modify a circuitry feature that has been exposed in a radiation sensitive layer by transmitting modifying radiation to a region of the radiation sensitive layer containing the exposed circuitry feature is described. The mask may reduce subwavelength distortions and proximity effect distortions of the exposed circuitry feature. The mask may be used to manufacture a semiconductor device having circuitry that is based on the modified circuitry feature.

US Patent:

7030657, Apr 18, 2006

Filed:

May 21, 2004

Appl. No.:

10/851505

Inventors:

Vladimir M. Stojanovic - Stanford CA, US
Andrew Ho - Palo Alto CA, US
Anthony Bessios - Fremont CA, US
Fred F. Chen - San Francisco CA, US
Elad Alon - Saratoga CA, US
Mark A. Horowitz - Menlo Park CA, US

Assignee:

Rambus Inc. - Los Altos CA

International Classification:

H03K 19/0175

US Classification:

326 87, 326 83

Abstract:

A signaling system having an equalizing transmitter and equalizing receiver. The equalizing transmitter transmits a signal to a receive circuit. A first sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a first threshold, and a second sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a second threshold. A drive strength of the equalizing transmitter and a drive strength of an equalizing signal driver within the equalizer are adjusted based, at least in part, on whether the first signal exceeds the first and second thresholds.

US Patent:

7126378, Oct 24, 2006

Filed:

Dec 17, 2003

Appl. No.:

10/740087

Inventors:

Vladimir M. Stojanovic - Stanford CA, US
Andrew C. C. Ho - Palo Alto CA, US
Anthony Bessios - Fremont CA, US
Fred F. Chen - San Francisco CA, US
Elad Alon - Saratoga CA, US
Mark A. Horowitz - Menlo Park CA, US

Assignee:

Rambus, Inc. - Los Altos CA

International Classification:

H03K 19/0175

US Classification:

326 87, 326 83, 326 27

Abstract:

A signaling system having first and second sampling circuits and an output driver circuit. The first sampling circuit samples a first signal generated by the output driver circuit to determine whether the first signal exceeds a first threshold. The second sampling circuit samples the first signal to determine whether the first signal exceeds a second threshold. The drive strength of the output driver circuit is adjusted based, at least in part, on whether the first signal exceeds the first and second thresholds, and the second threshold is adjusted based, at least in part, on whether the first signal exceeds the second threshold.

US Patent:

7126510, Oct 24, 2006

Filed:

Dec 17, 2004

Appl. No.:

11/015971

Inventors:

Elad Alon - Saratoga CA, US
Bruno W. Garlepp - San Jose CA, US
Vladimir Stojanovic - Stanford CA, US
Andrew Ho - Palo Alto CA, US
Fred F. Chen - San Francisco CA, US

Assignee:

Rambus Inc. - Los Altos CA

International Classification:

H03M 1/10

US Classification:

341120, 341118, 341152, 341155

Abstract:

An integrated circuit device includes one or more calibration paths including one or more devices. A signal generator is coupled to at least one calibration path and configured to provide the calibration path with a calibration signal having known characteristics. A controller is coupled to the signal generator and the calibration path and configured to adjust the signal generator and at least one parameter associated with at least one device in the calibration path.

US Patent:

7199615, Apr 3, 2007

Filed:

Mar 21, 2006

Appl. No.:

11/386984

Inventors:

Vladimir M. Stojanovic - Stanford CA, US
Andrew Ho - Palo Alto CA, US
Anthony Bessios - Fremont CA, US
Fred F. Chen - San Francisco CA, US
Elad Alon - Saratoga CA, US
Mark A. Horowitz - Menlo Park CA, US

Assignee:

Rambus Inc. - Los Altos CA

International Classification:

H03K 19/0175

US Classification:

326 82, 326 26

Abstract:

A signaling system having an equalizing transmitter and equalizing receiver. The equalizing transmitter transmits a signal to a receive circuit. A first sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a first threshold, and a second sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a second threshold. A drive strength of the equalizing transmitter and a drive strength of an equalizing signal driver within the equalizer are adjusted based, at least in part, on whether the first signal exceeds the first and second thresholds.

US Patent:

7233164, Jun 19, 2007

Filed:

Jun 23, 2004

Appl. No.:

10/875086

Inventors:

Vladimir M. Stojanovic - Stanford CA, US
Andrew Ho - Palo Alto CA, US
Fred F. Chen - San Francisco CA, US
Bruno W. Garlepp - San Jose CA, US

Assignee:

Rambus Inc. - Los Altos CA

International Classification:

H03K 17/16

US Classification:

326 22, 326 82

Abstract:

A receive circuit having a sampling circuit and a threshold generating circuit. The sampling circuit generates a first sample value having either a first state or a second state according whether an incoming signal exceeds a first threshold level, the first threshold level corresponding to a first threshold value. The threshold generating circuit combines a first control value and a second control value to generate the first threshold value and provides the first threshold value to the sampling circuit.

US Patent:

7292629, Nov 6, 2007

Filed:

Jul 12, 2002

Appl. No.:

10/195129

Inventors:

Jared L. Zerbe - Woodside CA, US
Vladimir M. Stojanovic - Stanford CA, US
Fred F. Chen - San Francisco CA, US

Assignee:

Rambus Inc. - Los Altos CA

International Classification:

H03H 7/30
H03H 7/40
H03K 5/159

US Classification:

375229, 375232, 375296

Abstract:

A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.