Frederick L Martin

US Patent:

6690748, Feb 10, 2004

Filed:

Dec 21, 2001

Appl. No.:

10/036620

Inventors:

Frederick J. Martin - Plantation FL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04L 2714

US Classification:

375324, 375316

Abstract:

A digital IF to base band demodulator ( ) includes delta sigma samplers ( ) for sampling two channels of an IF signal at a sampling rate that is substantially higher than the Nyquist rate for the IF signal. A first pair of decimation filters ( ) decimates and filters the output of the delta sigma samplers ( ) but keeps the samples at a rate sufficient to perform digital mixing, cross adding, and pulse shape match filtering. A set of mixers ( ) mixers the output of the first pair of decimation filters with two phases of a digital representation of an local IF signal. A pair of summers ( ) sums, and subtracts outputs of the set of mixers ( ) in order to cancel undesired harmonics. A second set of decimation filters ( ) decimates and filters the output of the summers ( ) applying a filter function that is matched to a pulse shape of a base band signal present in the IF signal.

US Patent:

6891420, May 10, 2005

Filed:

Dec 21, 2001

Appl. No.:

10/036558

Inventors:

Frederick L. Martin - Plantation FL, US
Robert E. Stengel - Pompano Beach FL, US
Jui-Kuo Juan - Coral Springs FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04B001/40
H04B007/00

US Classification:

327260, 455 76, 4551651, 4551831, 455209, 4555501, 375327, 375373, 375376

Abstract:

A digital frequency synthesizer includes one or more reference clocks (A, A, A) optionally coupled through one or more pulse width reducers () to one or more main delay lines (B, B, B) that include a plurality of output taps (B-I, B-E). During at least certain periods of the reference clock () a plurality of the output taps are coupled to a common output (), thereby producing an output signal that has a frequency that exceeds a frequency of the one or more reference clocks. The coupling is preferably accomplished by transmission gates () that are switched by gating pulses that are received from decoders () via gating signal delay lines ().

US Patent:

6922432, Jul 26, 2005

Filed:

Mar 9, 2001

Appl. No.:

09/803258

Inventors:

Frederick L. Martin - Plantation FL, US
Qicai Shi - Coral Springs FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04B001/69

US Classification:

375141, 375130, 375140, 375150, 370320

Abstract:

A signaling system is provided in which a spread spectrum code is cyclically shifted by a cyclical shift dictated by a bit pattern of one or more bits. The cyclically shifted spread spectrum code is used to modulate a carrier frequency, and transmitted from a transmitter to a receiver. At the receiver the signal including the cyclically shifted spectrum code is demodulated to recover the cyclically shifted code. The cyclical shift is then determined and the bit pattern which is associated with the cyclical shift is output. The method can be used in direct sequence spread spectrum communication.

US Patent:

7016661, Mar 21, 2006

Filed:

Oct 10, 2003

Appl. No.:

10/683098

Inventors:

Paul E. Gorday - West Palm Beach FL, US
Frederick L. Martin - Plantation FL, US
Qicai Shi - Coral Spings FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04B 1/10

US Classification:

455309, 455334, 375324, 329316

Abstract:

The present invention provides a multimode receiver design for mitigation of frequency offset by selective demodulation of an input modulated signal. The receiver () comprises a plurality of demodulators (). Each of the plurality of demodulators () has the same functionality but different receiver sensitivity versus frequency-offset mitigation characteristics. Each of these demodulators incorporates a different demodulation technique. A suitable demodulator is selected to demodulate the received signal. The choice of a suitable demodulator is based on the value of the frequency offset ().

US Patent:

7050467, May 23, 2006

Filed:

Aug 7, 2000

Appl. No.:

09/633705

Inventors:

Frederick L. Martin - Plantation FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04J 3/06
H03L 7/00

US Classification:

370517, 370503, 370518, 370519, 327141, 327161, 327162, 327163

Abstract:

A digital-to-phase or digital-to-time-shift converter () includes a delay line (), a multiplexor () and synchronization circuit (). In the converter () the clock edges of a reference signal are shifted in response to the value of a multi-bit digital word, IN (). The synchronization circuit () gates the output of the multiplexor () such that a pulse appears at the synchronization circuit's () output port () only when the circuit is gated by a signal at input TRIG (). The synchronization circuit () creates a time aperture for the multiplexor output.

US Patent:

7154978, Dec 26, 2006

Filed:

Nov 2, 2001

Appl. No.:

10/000914

Inventors:

Jui-Kuo Juan - Coral Springs FL, US
Robert E. Stengel - Pompano Beach FL, US
Frederick J. Martin - Plantation FL, US
David E. Bockelman - Dripping Springs TX, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03D 3/24

US Classification:

375376, 327149

Abstract:

A delay locked loop frequency synthesizer in several embodiments uses a primary delay line element () and one or more secondary delay elements (). In one embodiment, a main delay line () is used to coarsely select a frequency output while a secondary delay element (), either passive or active, is used to increase the resolution of the primary delay line (). In the passive embodiment, a coarse and fine frequency selection is possible by selecting components from the output taps of the main delay line () as a driving signal for the passive secondary delay element () to provide the coarse adjustment and selecting an output from the secondary delay element () to provide the fine selection.

US Patent:

7242947, Jul 10, 2007

Filed:

Dec 23, 2003

Appl. No.:

10/743961

Inventors:

Feng Niu - Weston FL, US
Spyros Kyperountas - Coral Springs FL, US
Frederick L. Martin - Plantation FL, US
Jian Huang - Coral Springs FL, US
Qicai Shi - Coral Springs FL, US
Timothy Bancroft - Boca Raton FL, US
Neiyer S. Correal - Cooper City FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04Q 7/20

US Classification:

4554561, 455 412, 455457, 4554042

Abstract:

A method and location determination module is provided for determining a location of one of a plurality of units using neighbor lists. Each unit is communicatively coupled to at least some of the other plurality of units, where at least some of the plurality of units are reference units, whose locations are known. The units communicate with other nearby units within communication range, to establish neighbor lists. A unit to be located then identifies an aggregate value corresponding to the number of occurrences of the reference units in the neighbor list of the unit to be located and the neighbor lists of each of a group of associated units. The location of the unit to be located is then determined, based upon the known locations of the reference units and the number of identified occurrences of the reference units in the corresponding neighbor lists.

US Patent:

7277457, Oct 2, 2007

Filed:

Oct 3, 2003

Appl. No.:

10/678416

Inventors:

Paul E. Gorday - West Palm Beach FL, US
Frederick L. Martin - Plantation FL, US
David B. Taubenheim - Plantation FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04J 3/06

US Classification:

370509, 370480, 37524028

Abstract:

A method () and system for compensation of frequency offset between a first transceiver () and a second transceiver () in wireless communication are disclosed. The compensation of the frequency offset between two or more transceivers () is achieved using frequency synchronization bursts. These bursts contain information about the frequency offset. The frequency synchronization bursts are transmitted by the first transceiver at a range of frequencies above and below its carrier frequency (). A second transceiver that receives at least one of these bursts () determines the frequency offset (), and adjusts its frequency to match the frequency of the first transceiver (). Thereafter, the second transceiver may enter a low power sleep mode () in order to reduce its power consumption. The second transceiver returns to active mode () just before the start of the transmission of the data packets ().