Frederick M Martin

US Patent:

6519275, Feb 11, 2003

Filed:

Dec 18, 2001

Appl. No.:

10/022942

Inventors:

Neiyer S. Correal - Cooper City FL
Paul E. Gorday - West Palm Beach FL
Frederick L. Martin - Plantation FL
Qicai Shi - Coral Springs FL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04B 1707

US Classification:

375140, 375145, 375149, 375150

Abstract:

A system and method for orthogonal modulation of signals in communication systems. In the transmitter, differentially coded symbols are used to select time-shifted code sequences. The timing, or code position, of a code sequence is determined at the receiver by comparison to the previous code from the same channel, thus eliminating the need for dual-channel transmission and eliminating error due to differences in path propagation time. A fixed preamble code is also used to synchronize the receiver.

US Patent:

6690748, Feb 10, 2004

Filed:

Dec 21, 2001

Appl. No.:

10/036620

Inventors:

Frederick J. Martin - Plantation FL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04L 2714

US Classification:

375324, 375316

Abstract:

A digital IF to base band demodulator ( ) includes delta sigma samplers ( ) for sampling two channels of an IF signal at a sampling rate that is substantially higher than the Nyquist rate for the IF signal. A first pair of decimation filters ( ) decimates and filters the output of the delta sigma samplers ( ) but keeps the samples at a rate sufficient to perform digital mixing, cross adding, and pulse shape match filtering. A set of mixers ( ) mixers the output of the first pair of decimation filters with two phases of a digital representation of an local IF signal. A pair of summers ( ) sums, and subtracts outputs of the set of mixers ( ) in order to cancel undesired harmonics. A second set of decimation filters ( ) decimates and filters the output of the summers ( ) applying a filter function that is matched to a pulse shape of a base band signal present in the IF signal.

US Patent:

6891420, May 10, 2005

Filed:

Dec 21, 2001

Appl. No.:

10/036558

Inventors:

Frederick L. Martin - Plantation FL, US
Robert E. Stengel - Pompano Beach FL, US
Jui-Kuo Juan - Coral Springs FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04B001/40
H04B007/00

US Classification:

327260, 455 76, 4551651, 4551831, 455209, 4555501, 375327, 375373, 375376

Abstract:

A digital frequency synthesizer includes one or more reference clocks (A, A, A) optionally coupled through one or more pulse width reducers () to one or more main delay lines (B, B, B) that include a plurality of output taps (B-I, B-E). During at least certain periods of the reference clock () a plurality of the output taps are coupled to a common output (), thereby producing an output signal that has a frequency that exceeds a frequency of the one or more reference clocks. The coupling is preferably accomplished by transmission gates () that are switched by gating pulses that are received from decoders () via gating signal delay lines ().

US Patent:

6922432, Jul 26, 2005

Filed:

Mar 9, 2001

Appl. No.:

09/803258

Inventors:

Frederick L. Martin - Plantation FL, US
Qicai Shi - Coral Springs FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04B001/69

US Classification:

375141, 375130, 375140, 375150, 370320

Abstract:

A signaling system is provided in which a spread spectrum code is cyclically shifted by a cyclical shift dictated by a bit pattern of one or more bits. The cyclically shifted spread spectrum code is used to modulate a carrier frequency, and transmitted from a transmitter to a receiver. At the receiver the signal including the cyclically shifted spectrum code is demodulated to recover the cyclically shifted code. The cyclical shift is then determined and the bit pattern which is associated with the cyclical shift is output. The method can be used in direct sequence spread spectrum communication.

US Patent:

7050467, May 23, 2006

Filed:

Aug 7, 2000

Appl. No.:

09/633705

Inventors:

Frederick L. Martin - Plantation FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04J 3/06
H03L 7/00

US Classification:

370517, 370503, 370518, 370519, 327141, 327161, 327162, 327163

Abstract:

A digital-to-phase or digital-to-time-shift converter () includes a delay line (), a multiplexor () and synchronization circuit (). In the converter () the clock edges of a reference signal are shifted in response to the value of a multi-bit digital word, IN (). The synchronization circuit () gates the output of the multiplexor () such that a pulse appears at the synchronization circuit's () output port () only when the circuit is gated by a signal at input TRIG (). The synchronization circuit () creates a time aperture for the multiplexor output.

US Patent:

7154978, Dec 26, 2006

Filed:

Nov 2, 2001

Appl. No.:

10/000914

Inventors:

Jui-Kuo Juan - Coral Springs FL, US
Robert E. Stengel - Pompano Beach FL, US
Frederick J. Martin - Plantation FL, US
David E. Bockelman - Dripping Springs TX, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03D 3/24

US Classification:

375376, 327149

Abstract:

A delay locked loop frequency synthesizer in several embodiments uses a primary delay line element () and one or more secondary delay elements (). In one embodiment, a main delay line () is used to coarsely select a frequency output while a secondary delay element (), either passive or active, is used to increase the resolution of the primary delay line (). In the passive embodiment, a coarse and fine frequency selection is possible by selecting components from the output taps of the main delay line () as a driving signal for the passive secondary delay element () to provide the coarse adjustment and selecting an output from the secondary delay element () to provide the fine selection.

US Patent:

7242947, Jul 10, 2007

Filed:

Dec 23, 2003

Appl. No.:

10/743961

Inventors:

Feng Niu - Weston FL, US
Spyros Kyperountas - Coral Springs FL, US
Frederick L. Martin - Plantation FL, US
Jian Huang - Coral Springs FL, US
Qicai Shi - Coral Springs FL, US
Timothy Bancroft - Boca Raton FL, US
Neiyer S. Correal - Cooper City FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04Q 7/20

US Classification:

4554561, 455 412, 455457, 4554042

Abstract:

A method and location determination module is provided for determining a location of one of a plurality of units using neighbor lists. Each unit is communicatively coupled to at least some of the other plurality of units, where at least some of the plurality of units are reference units, whose locations are known. The units communicate with other nearby units within communication range, to establish neighbor lists. A unit to be located then identifies an aggregate value corresponding to the number of occurrences of the reference units in the neighbor list of the unit to be located and the neighbor lists of each of a group of associated units. The location of the unit to be located is then determined, based upon the known locations of the reference units and the number of identified occurrences of the reference units in the corresponding neighbor lists.

US Patent:

7295638, Nov 13, 2007

Filed:

Nov 17, 2003

Appl. No.:

10/715222

Inventors:

Frederick L. Martin - Plantation FL, US
Edgar H. Callaway - Boca Raton FL, US
Paul E. Gorday - West Palm Beach FL, US
David B. Taubenheim - Plantation FL, US

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03D 1/06
H03D 11/04
H03K 5/01
H04B 1/10
H04L 1/00

US Classification:

375348, 375238, 375239, 375242, 375256, 375257, 375286, 375353, 3072001, 329300, 329304, 341126, 455130, 455296

Abstract:

A direct sequence spread spectrum (DSSS) receiver () consistent with certain embodiments has a frequency generator () that generates a local oscillator signal without use of a piezoelectric crystal. A frequency converter () receives the local oscillator signal and mixes the local oscillator signal with a received DSSS signal to produce a down-converted signal. The received DSSS signal is encoded using a first set of DSSS code. A differential chip detector () receives the down-converted signal and converts the down-converted signal to a differentially detected signal. A correlator () receives the differentially detected signal and correlates the detected signal with a set of DSSS codes that are time-shifted from the first set of DSSS codes. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.