Ganesh Suryanarayanan from 3681 Wally Place Way, San Jose, CA 95121, age 52, Phone: 4085329186

Ganesh Suryanarayanan Phones & Addresses

Memory Device For A Microprocessor Register File Having A Power Management Scheme And Method For Copying Information Between Memory Sub-Cells In A Single Clock Cycle
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US Patent:

61733792, Jan 9, 2001
Filed:

May 14, 1996
Appl. No.:

8/645653
Inventors:

Mircea Poplingher - Campbell CA
Wenliang Chen - Sunnyvale CA
Ganesh Suryanarayanan - Santa Clara CA
Wayne W. Chen - San Jose CA
Roger Y. Lo - San Jose CA
Assignee:

Intel Corporation - Santa Clara CA
International Classification:

G06F 1300
G11C 11413
US Classification:

711165
Abstract:

A memory device including an array of memory cells and a method for copying information within the memory device. Each memory cell includes a first memory sub-cell and a second memory sub-cell. Each memory cell also includes a device that copies information from the first memory sub-cell into the second memory sub-cell. Each memory cell may include a static random access memory (SRAM) cell and may utilize tri-state inverters to make overwriting information easier and reduce power consumption. Each memory cell may also include a second copy device that allows information to be copied from the second memory sub-cell to the first memory sub-cell. The memory device may be provided in a register file of a microprocessor to copy information from an architectural branch register (ABR) file to a speculative branch register (SBR) file.