George R Hall

US Patent:

60055316, Dec 21, 1999

Filed:

Sep 23, 1998

Appl. No.:

9/158827

Inventors:

John W. Cassen - Sykesville MD
Gary N. Bonadies - Laurel MD
Patrick K. Richard - Baltimore MD
David A. Herlihy - Ellicott City MD
Ayn U. Fuller - Greenbelt MD
Daniel H. Wenzlick - Linthicum MD
Richard C. Kapraun - Baltimore MD
Mark R. Schrote - Ellicott City MD
Kerry M. Yon - Beltsville MD
H. Halley Lisle - Monrovia MD
Toby Hess - Olney MD
Edward L. Rich - Arnold MD
George T. Hall - Catonsville MD
Brian T. Drude - Arbutus MD

Assignee:

Northrop Grumman Corporation - Los Angeles CA

International Classification:

H01Q 2100

US Classification:

343853

Abstract:

An antenna assembly for an active electronically scanned array includes, among other things: an array of antenna elements; an RF signal feed and circulator assembly coupled to said antenna elements and forming thereby an array of radiating structures; a generally planar RF manifold assembly having regularly spaced openings therein located behind and normal to the radiating structures; an array of T/R modules connected to the array of radiating structures and having respective RF connector assemblies forming a portion of an RF interface at one end portion of each of the modules which project upwardly through said spaced openings in the RF manifold and wherein the respective connector assemblies thereof connect to at least one immediately adjacent circulator as well as to transmit and receive manifold portions of the RF manifold; each of the T/R modules further have a heat sink plate on the back side thereof which is positioned against one of a number of elongated liquid coolant circulating coldplates connected to a coolant distribution manifold encircling the array; a DC power and logic signal distribution manifold; and, a plurality of elongated DC/logic circuit board members connected to the DC power and logic signal distribution manifold and being respectively located adjacent and coextensive with a respective coldplate for supplying DC power and logic control signals to a DC/logic interface located at the other end portion of the respective modules.