Gerald G Keller

US Patent:

52215962, Jun 22, 1993

Filed:

Sep 3, 1991

Appl. No.:

7/753461

Inventors:

Gerald A. Keller - Chandler AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

G03C 500

US Classification:

430324

Abstract:

A retrograde profile is formed in a photoresist layer (11, 20) by modifying the rate at which a photoresist developer solution dissolves a portion (12) of a photoresist layer (11, 20). The photoresist layer (11, 20) is exposed to a chemical such as hexamethyldisilizane or dimethylsulfoxane to allow a portion (12) of the photoresist (11, 20) to absorb the chemical. The photoresist (11, 20) is then heated in order to enhance a reaction between the photoresist (11, 20) and the chemical. The reaction modifies a portion (12) of the photoresist (11, 20) to reduce the rate at which the portion (12) of the photoresist (11, 20) is dissolved by a developer solution.

US Patent:

54478740, Sep 5, 1995

Filed:

Jul 29, 1994

Appl. No.:

8/282360

Inventors:

Gordon Grivna - Mesa AZ
Bruce A. Bernhardt - Chandler AZ
Gerald Keller - Chandler AZ

International Classification:

H01L 21338

US Classification:

437 40

Abstract:

A method of manufacturing a semiconductor device gate is provided that reduces gate length variability while maintaining self-alignment and eliminating etch damage and substrate contamination. A gate opening (18) is formed in an oxide layer (16) using a anisotropic etch. The anisotropic etch creates a reverse gate metal image that has low gate length variability. Dual metal gate (26) is then deposited. The excess gate metal is then removed and the top surface (31) of the gate (30) planarized using a chemical mechanical polish. The remaining oxide (16) is then removed, leaving a precise gate (30). The use of a nitride barrier (12) and of an etchstop layer (14) of aluminum nitride under the oxide layer (16) is also shown.