The United States of America as represented by the Secretary of the Air Force - Washington DC
International Classification:
G06K 964 H04N 514
US Classification:
382 41
Abstract:
The Sobel square root algorithm S={[(a+2b+c)-(g+2f+e)]. sup. 2 +[(a+2H+g)-(c+2d+e)]. sup. 2 }. sup. 1/2, with 8-bit input data from a 3. times. 3 window and 6-bit output is performed on a single VLSI chip, using a square table only 128. times. 13 and a square root table only 1027 or 1032. times. 6 in ROM. The random logic including adders and clock circuits are also on the same chip with the ROM tables.
Ronald A. Belt - Plymouth MN Guy D. Couturier - Beavercreek OH
Assignee:
The United States of America as represented by the Secretary of the Air Force - Washington DC
International Classification:
G06F 1531
US Classification:
364724
Abstract:
The device performs the function ##EQU1## for image processing, where W. sub. i are fixed weights for any specific application. It uses a PROM and accumulator algorithm, in which the memory stores the values ##EQU2## in 2. sup. M words, with addresses formed from one bit of each data word in a given bit position. In operation the most significant bit of each data word is used first to address memory, and in successive clock cycles the other bit positions are used down to the least significant. The memory output words are supplied to the adder-accumulator, and in each clock cycle the adder-accumulator output is shifted left one bit and used as a second input thereof. Then if the data words have N bits designated j=0 to N-1, after N clock cycles the memory output words have each been effectively multiplied by 2. sup. j and accumulated in the sum.