Harikumar B Nair

US Patent:

56174314, Apr 1, 1997

Filed:

Aug 2, 1994

Appl. No.:

8/284163

Inventors:

Raghuram S. Tupuri - Austin TX
Harikumar B. Nair - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 1100

US Classification:

371 27

Abstract:

Test vectors are applied to a single integrated circuit containing at least one logic core for which a preexisting test vector set exists. Each test vector ordinarily applied in one cycle to test a core by itself, is converted into a first and second test vector. The first test vector is applied to input pins of the single integrated circuit during a first time period. Test registers connected to the input pins of the integrated circuit are loaded with signal values from the first test vector. The test registers are loaded according to a load signal. The test registers are connected between the input pins and a first set of drivers, the drivers being connected to the logic core under test. The second test vector is applied through the input pins to a second set of drivers during a second time period. A test mode signal is provided from a test interface to control the drivers.

US Patent:

55834540, Dec 10, 1996

Filed:

Dec 1, 1995

Appl. No.:

8/566131

Inventors:

Keith G. Hawkins - Dripping Springs TX
Harikumar B. Nair - Austin TX
Shivachandra I. Javalagi - Austin TX
Kuok Y. Ling - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H03K 190175

US Classification:

326 81

Abstract:

An integrated circuit is presented having a driver circuit programmable to produce a variety of output voltages and conductive to the voltage levels of circuits interfaced by the integrated circuit. The integrated circuit includes programmable pullup and pulldown functions. The integrated circuit may be configured into an application having devices powered by a power supply voltage which is substantially larger than the voltage supplying the core section of the integrated circuit. Additionally, the present integrated circuit may be configured into other applications having devices powered by a power supply voltage substantially similar to the voltage supplying the integrated circuit core section. The present integrated circuit therefore retains utility for a large variety of applications. The pullup and pulldown transistors may be programmed to provide a resistive one, resistive zero, or neither.

US Patent:

56660715, Sep 9, 1997

Filed:

Dec 1, 1995

Appl. No.:

8/565684

Inventors:

Keith G. Hawkins - Dripping Springs TX
Harikumar B. Nair - Austin TX
Shivachandra I. Javalagi - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H03K 190175
H03K 19094

US Classification:

326 86

Abstract:

An integrated circuit incorporating programmable pullup and pulldown devices into each input/output (I/O) pad is described. Each I/O pad may be individually programmed to include a pullup or pulldown function. Pullup and pulldown resistors may be removed from a system employing the present integrated circuit. Programming of the I/O pads may be accomplished in a number of ways. Following the deassertion of a reset signal, high impedance states may be transferred into a shift data storage within the integrated circuit. Once the states are received, they are shifted to the respective I/O pads through a serial chain connection of the pullup and pulldown devices within each I/O pad. The states are then maintained by each pullup and pulldown device until a subsequent reprogramming. Software programs may also reprogram the pullup and pulldown states by storing appropriate values into the shift data storage. The program then sets an appropriate value into a status register included within the integrated circuit.