Henry Andrew Warren

US Patent:

56130805, Mar 18, 1997

Filed:

Aug 8, 1996

Appl. No.:

8/695750

Inventors:

David S. Ray - Georgetown TX
Larry E. Thatcher - Austin TX
Henry S. Warren - Ossining NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 930

US Classification:

395390

Abstract:

A multiple execution unit processing system is provided wherein each execution unit has an associated instruction buffer and all instruction are executed in order. The first execution unit (unit 0) will always contain the oldest instruction and the second unit (unit 1) the newest. Processor instructions, such as load, store, add and the like are provided to each of the instruction buffers (0,1) from an instruction cache buffer. The first instruction (oldest) is placed in buffer 0 and the next (second) instruction is stored in buffer 1. It is determined during the decode stage whether the instructions are dependent on an immediately preceding instruction. If both instructions are independent of other instructions, then they can execute in parallel. However, if the second instruction is dependent on the first, then (subsequent to the first instruction being executed) it is laterally shifted to the first instruction buffer. Instructions are also defined as being dependent on an unavailable resource.