Howard Joseph Holyoak - High Point NC John Cody Bailey - Mebane NC
Assignee:
RF Micro Devices, Inc. - Greensboro NC
International Classification:
H01L 2144
US Classification:
438123, 257684
Abstract:
The present invention controls attachment of a first semiconductor material, such as a semiconductor die, to a second semiconductor material, such as a bond pad, substrate, or the like. A placement tool is used to pick up the first semiconductor material and move it to a defined position above the top surface of the second semiconductor material. The second semiconductor material will have an adhesive, such as epoxy, applied to its top surface. From the defined position above the second semiconductor material, the placement tool is allowed to fall for an amount of time previously determined to result in an adhesive layer of a defined thickness, within precise tolerances. The adhesive thickness is often referred to as bond line thickness (BLT) when bonding a semiconductor die to a bond pad, substrate, or the like.
The present disclosure relates to a shielded integrated module, which includes a module substrate with a number of perimeter bond pads, at least one electronic component attached to the module substrate and encapsulated by a mold compound, a number of perimeter vertical shield contacts, and a shielding structure. The perimeter bond pads are surrounding the at least one electronic component and encapsulated by the mold compound. Each perimeter vertical shield contact is coupled to a corresponding perimeter bond pad and extends through the mold compound, such that a top tip of each perimeter vertical shield contact is exposed at a top surface of the mold compound. The shielding structure completely covers the top surface of the mold compound and is in contact with the perimeter vertical shield contacts.
- Greensboro NC, US Howard Joseph Holyoak - High Point NC, US
International Classification:
H01L 23/552 H01L 23/532 H01L 21/78
Abstract:
The present disclosure relates to a shielded integrated module, which includes a module substrate with a number of perimeter bond pads, at least one electronic component attached to the module substrate and encapsulated by a mold compound, a number of perimeter vertical shield contacts, and a shielding structure. The perimeter bond pads are surrounding the at least one electronic component and encapsulated by the mold compound. Each perimeter vertical shield contact is coupled to a corresponding perimeter bond pad and extends through the mold compound, such that a top tip of each perimeter vertical shield contact is exposed at a top surface of the mold compound. The shielding structure completely covers the top surface of the mold compound and is in contact with the perimeter vertical shield contacts.
- Greensboro NC, US Howard Joseph Holyoak - High Point NC, US
International Classification:
H01L 23/552 H01L 23/532 H01L 21/78
Abstract:
The present disclosure relates to a shielded integrated module, which includes a module substrate with a number of perimeter bond pads, at least one electronic component attached to the module substrate and encapsulated by a mold compound, a number of perimeter vertical shield contacts, and a shielding structure. The perimeter bond pads are surrounding the at least one electronic component and encapsulated by the mold compound. Each perimeter vertical shield contact is coupled to a corresponding perimeter bond pad and extends through the mold compound, such that a top tip of each perimeter vertical shield contact is exposed at a top surface of the mold compound. The shielding structure completely covers the top surface of the mold compound and is in contact with the perimeter vertical shield contacts.
Surface Finish For Conductive Features On Substrates
- Greensboro NC, US Jungwoo Lee - Greensboro NC, US John August Orlowski - Summerfield NC, US Howard Joseph Holyoak - High Point NC, US
International Classification:
H05K 7/06 H05K 13/00 H05K 1/09
Abstract:
An electronics module includes a non-conductive body, a first set of conductive features exposed on a surface of the non-conductive body, and a second set of conductive features exposed on the surface of the non-conductive body. The first set of conductive features is configured to connect to a wire bond component. The second set of conductive features is configured to connect to a flip chip component. A protective finish is provided over each one of the first set of conductive features and the second set of conductive features. The protective finish includes a layer of nickel less than 1 μm thick, a layer of palladium over the layer of nickel, and a layer of gold over the layer of palladium.