Hung Che Lin

US Patent:

6480413, Nov 12, 2002

Filed:

Oct 10, 2001

Appl. No.:

09/973466

Inventors:

Hung Chang Lin - Silver Spring MD

Assignee:

Epitaxial Technologies LLC - Baltimore MD

International Classification:

G11C 1136

US Classification:

365175, 365105

Abstract:

Two resonant tunneling diodes with hysteretic folding V-I characteristics are connected in series. The node voltage and the series current of the cell determine the memory state and there can be a large number of states. During writing, one writing pulse sets the pull-down RTD to one of the positive differential resistance region of the hysteretic V-I characteristic, and a second writing pulse sets the pull-up RTD to one of positive differential resistance region. During writing, the series current is sensed by measuring the colon ground current.

US Patent:

6774699, Aug 10, 2004

Filed:

Jul 10, 2003

Appl. No.:

10/616212

Inventors:

Hung Chang Lin - Silver Spring MD

Assignee:

Maryland Semiconductor, Inc. - Clarksburg MD

International Classification:

G06G 712

US Classification:

327355, 327411, 327356

Abstract:

A BJT operating as a mixer has its collector biased at the knee of the I vs V characteristic. A local oscillator voltage is applied to the base and an RF signal voltage is applied to the collector through a singled-ended emitter follower. The nonlinear curvature at the knee produces a beat frequency current. The base of the emitter follower can be fed from a current mirror or through an ohmic resistor. This mixer requires less supply voltage, and results in more conversion gain and less feed-through of the RF input signal than the Gilbert multiplier. Alternatively, the RF voltage can be applied to the gate and the local oscillator voltage can be applied to the drain. Sometimes, it is more desirable to invert the collector and the emitter, or to connect a normal transistor and an inverted transistor in parallel to optimize conversion gain.

US Patent:

6812763, Nov 2, 2004

Filed:

Jun 30, 2003

Appl. No.:

10/608303

Inventors:

Hung C. Lin - Silver Spring MD
Chiang H. Yeh - Gaithersburg MD

Assignee:

Marylabd Semiconductor, Inc. - Clarksburg MD

International Classification:

H03H 1116

US Classification:

327254, 327238, 327357

Abstract:

When two sine-wave signals in quadrature, the integral of the output is equal to zero. Conversely, when an in-phase signal is inputted as one multiplicand and the output is set to zero, a quadrature signal is derived from the second multiplicand automatically. Any analog multiplier can be used. Examples using differential pair and conductance multiplier have been demonstrated. The multiplier operates over a wideband, and the in phase and quadrature signals can be equalized automatically.

US Patent:

6873202, Mar 29, 2005

Filed:

Oct 20, 2003

Appl. No.:

10/688437

Inventors:

Hung Chang Lin - Silver Spring MD, US

Assignee:

Maryland Semiconductor, Inc. - Clarksburg MD

International Classification:

H03K017/60

US Classification:

327432, 330296

Abstract:

A MOSFET can operate as a resistor by operating in the linear or ohmic region of the drain V-I characteristics. This region can be obtained by floating the gate of the MOSFET, when the dc current and the voltage drop are given. Multiple resistors can be duplicated (or mirrored) by sharing the same source and floating gate. The floating gate voltage can be simulated using a closed loop equivalent circuit. Alternatively, the gate voltage can also be derived from the given drain-to-source voltage and the given current in a feedback loop. With this adaptive MOSFET resistor, the minimum supply voltage can be as low as the sum of the BJT threshold and the complementary BJT saturation voltage, e. g. V≧V+Vsat (e. g. 0. 8+0. 15

US Patent:

7194243, Mar 20, 2007

Filed:

Apr 2, 2004

Appl. No.:

10/816087

Inventors:

Hung C. Lin - Silver Spring MD, US
Weixin Kong - Germantown MD, US

Assignee:

Maryland Semiconductor Inc. - Clarksburg MD

International Classification:

H04B 1/06

US Classification:

4552321, 4552341, 4552261, 4552451, 327307

Abstract:

In a direct conversion receiver with zero-frequency intermediate frequency (IF) signal, the DC offset and 1/f noise of the IF signal is compensated by means of double-sampling. The first period of the doubling-sampling is a calibration phase, which stores the DC offset and the 1/f noise. The second period is a signal flow phase during which the stored DC offset and 1/f noise is connected in opposition with the IF signal to cancel the DC offset and 1/f noise.

US Patent:

20030067357, Apr 10, 2003

Filed:

Aug 26, 2002

Appl. No.:

10/227658

Inventors:

Hung Lin - Silver Spring MD, US
Ming-Hao Sun - Rockville MD, US

International Classification:

H03L007/00

US Classification:

331/017000

Abstract:

An ac input voltage is fed to one input of a multiplier serving phase comparator of a phase-locked loop. The output voltage of the VCO feeding the second input of the phase comparator to lock the frequency has a /4 phase shift with respect to the input voltage. When two such phase locked loops are connected in tandem, a /2 quadrature voltage is obtained. When more than two phase-locked loops are connected in tandem, any multiples of /4 phase shift can be obtained.

US Patent:

20040056333, Mar 25, 2004

Filed:

Sep 24, 2002

Appl. No.:

10/252883

Inventors:

Hung Lin - Silver Spring MD, US
Sesha Shankar - Germantown MD, US
Jonathan Pfeifer - North Potomac MD, US

International Classification:

H01L023/552
H01L029/94

US Classification:

257/659000, 257/660000, 257/409000

Abstract:

An integrated circuit is divided into a number of sub-circuits by isolation walls in the substrate. A conducting shield overlays every sub-circuit to form a grounded cage with the underlying substrate for trapping electromagnetic radiation generated inside the sub-circuit, and to prevent cross-talk between the sub-circuits.

US Patent:

62855824, Sep 4, 2001

Filed:

Mar 20, 2000

Appl. No.:

9/528861

Inventors:

Hung Chang Lin - Silver Spring MD

Assignee:

Epitaxial Technologies, LLC - Baltimore MD

International Classification:

G11C 1136

US Classification:

365175

Abstract:

A two-dimensional memory comprises a matrix of multi-valued resonant tunneling diodes (RTD). Each memory cell has two series RTDs with hysteretic folding V-I characteristics. The memory state is determined by the node voltage between the two RTDs and the series current. Each memory cell has two terminals connected to two bit lines through word line switches. The two bit lines are fed with two sets of multi-valued data and are written into the cell by two consecutive pulses to set the operating point. The two sets of multi-valued data are converted by two D/A converters from two sub-words of the binary digital word. The memory state is read by the sensing the voltages at the two terminals, or voltage at one terminal and the current through the other terminal.