Hyung Won Kim

US Patent:

20100254617, Oct 7, 2010

Filed:

Apr 1, 2009

Appl. No.:

12/416850

Inventors:

HAU HWANG - San Diego CA, US
SHIZHONG LIU - San Diego CA, US
JOSEPH CHEUNG - San Diego CA, US
HYUNG COOK KIM - San Diego CA, US

Assignee:

QUALCOMM Incorporated - San Diego CA

International Classification:

G06K 9/36
G06K 9/32

US Classification:

382232, 382296, 382235

Abstract:

Image processing systems and methods are disclosed. In a particular embodiment, a method is disclosed that includes receiving image data of an image. The image data includes a plurality of image blocks. The method further includes calculating a first differential DC value during a rotation operation of the image by comparing a first DC coefficient value of a first block of a first row of the image to a second DC coefficient value of a first block of a second row of the image. The method further includes storing the first differential DC value in a memory prior to completing the rotation operation.

US Patent:

55306233, Jun 25, 1996

Filed:

Nov 19, 1993

Appl. No.:

8/154577

Inventors:

Ikuo J. Sanwo - San Marcos CA
Michael A. Hoffman - San Diego CA
Hyung S. Kim - Temecula CA

Assignee:

NCR Corporation - Dayton OH

International Classification:

H01R 909
H01R 2370
H01R 2900

US Classification:

361788

Abstract:

A memory packaging scheme for high speed computer systems includes, several memory module sockets mounted to a printed circuit board and interconnected by a common set of address, data and control transmission lines within the printed circuit board. The transmission lines are interrupted at each connector. Cooperating memory modules, such as SIMM memory modules are installed in sequence into one or more of the module sockets in accordance with the requirements of the computer system. Installation of a memory module into a memory socket closes the open circuits for each one of the transmission lines at the memory socket, extending the uninterrupted length of the transmission lines to the next memory socket in the sequence. The memory socket and cooperating memory module design thus provides for sizing of the memory board transmission line lengths to accommodate the number of memory modules installed into memory board sockets, thereby eliminating undesirable transmission line effects from occurring within the printed circuit board transmission lines connecting the memory modules.