James L Booth

US Patent:

6366174, Apr 2, 2002

Filed:

Feb 21, 2000

Appl. No.:

09/510124

Inventors:

John B. Berry - Lexington KY
James R. Booth - Nicholasville KY
Keith B. Hardin - Lexington KY
John P. Richey - Lexington KY

Assignee:

Lexmark International, Inc. - Lexington KY

International Classification:

H03L 7085

US Classification:

331 78, 331 1 A, 331 18, 327106, 327159, 375376, 375200

Abstract:

An improved clock generation circuit is provided that operates with a single input clock frequency, and includes a Phase Locked Loop circuit (PLL) with a digital accumulator in the feedback loop, in which either the Most Significant Bit or the Carry Bit of the binary adder is used as the modulated feedback clock to the phase/frequency detector of the PLL. In one embodiment, a fixed add/phase amount is used to drive one of the inputs of the binary adder to generate a fixed output frequency. If it is desired to modulate the output frequency, then an Add Amount Modulator circuit can be provided that presents a varying numeric value to one of the inputs of the binary adder. The MSB or Carry Bit is communicated to an address look-up table, which then outputs an address to a memory circuit, which in turn presents a different add amount to the binary adder. If a periodic modulation is desired, the address look-up table will point to add amounts that create a particular periodic output frequency profile, which could include a Spread Spectrum profile. Certain optional circuits may be included, such as: a pre-multiply or pre-divide circuit to either increase or decrease the frequency of the input clock signal before it reaches the phase/frequency detector of the PLL; an output divider to provide a lower output clock frequency; a feedback divider to lower the VCOs output frequency before it is directed into the digital accumulator; a synchronizing input (Sync Input); a synchronizing output (Sync Output); a Base Number register to keep the memory size of the look-up table to a reasonably small value; or a Start Number register to provide the add amount upon initialization.

US Patent:

7424398, Sep 9, 2008

Filed:

Jun 22, 2006

Appl. No.:

11/425893

Inventors:

James Ronald Booth - Nicholasville KY, US
Mike Partington - Lexington KY, US

Assignee:

Lexmark International, Inc. - Lexington KY

International Classification:

G06F 9/445

US Classification:

702186

Abstract:

A boot validation system and method may be used in a computer system to validate boot code before allowing the computer system to execute the boot code. In particular, a secure hash algorithm may be used to compute a hash value of the boot code and the computed hash value may be compared to a preprogrammed hash value stored in a secure non-volatile device. If the hash values match the boot code may be validated and the system may then be allowed to execute the boot code. Once the boot code is validated, the boot code may be executed to validate other code (e. g. , firmware) in the computer system. In an exemplary embodiment, the boot validation systems and method may be used in an imaging device, such as a printer.

US Patent:

7426613, Sep 16, 2008

Filed:

Jun 16, 2005

Appl. No.:

11/154117

Inventors:

James Ronald Booth - Nicholasville KY, US
Bryan Scott Willett - Lexington KY, US

Assignee:

Lexmark International, Inc. - Lexington KY

International Classification:

G06F 12/00
G06F 13/00
G06F 13/28
G06F 9/26
G06F 9/34
G06F 3/00
G11C 11/34
G11C 16/04

US Classification:

711150, 711154, 711156, 711200, 710 19, 36518533

Abstract:

Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or all of the memory modules may be addressed with a single command, which may be an increment counter command, a write command, or a punch out bit field. The status of the memory modules may be determined by sampling a single signal that may be at a low, high, or intermediate voltage level.

US Patent:

7844786, Nov 30, 2010

Filed:

Apr 22, 2008

Appl. No.:

12/107278

Inventors:

James Ronald Booth - Nicholasville KY, US
Bryan Scott Willett - Lexington KY, US

Assignee:

Lexmark International, Inc. - Lexington KY

International Classification:

G06F 12/00
G06F 13/00
G06F 13/28

US Classification:

711156, 711103, 711148, 711150

Abstract:

Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or all of the memory modules may be addressed with a single command, which may be an increment counter command, a write command, or a punch out bit field. The status of the memory modules may be determined by sampling a single signal that may be at a low, high, or intermediate voltage level.

US Patent:

8190869, May 29, 2012

Filed:

Apr 17, 2007

Appl. No.:

11/787545

Inventors:

James R. Booth - Nicholasville KY, US
John F. Gostomski - Lexington KY, US
Mike Partington - Lexington KY, US

Assignee:

Lexmark International, Inc. - Lexington KY

International Classification:

G06F 21/00

US Classification:

713 2, 713194, 726 26, 726 34

Abstract:

Methods for authenticating firmware in a computing device include partitioning functions critical to the intended role of the computing device so that, upon successful authentication of the firmware, all functions of the device are made operational. Otherwise, the computing device behaves in a diagnostic mode of operation to assist users in troubleshooting to eventually authenticate firmware. At least first and second sets of firmware are loaded at various times into a controller of the computing device with the first set occurring without verification of trustworthiness, while the second set occurs upon authentication of the first. The second is used to authenticate a remainder set of firmware. Particular computing devices contemplate laser printers, mobile phones, PDA's, gaming consoles, etc. Firmware downloads, error messaging, hash comparisons, signature table construction, page-in techniques, computer program products, and particular computing arrangements are other noteworthy features, to name a few.

US Patent:

8521970, Aug 27, 2013

Filed:

Apr 19, 2006

Appl. No.:

11/406542

Inventors:

James Ronald Booth - Nicholasville KY, US
Bryan Scott Willett - Lexington KY, US

Assignee:

Lexmark International, Inc. - Lexington KY

International Classification:

G06F 12/00
G06F 13/00
G06F 13/28

US Classification:

711156, 711103, 711148, 711150, 711154

Abstract:

Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or all of the memory modules may be addressed with a single command, which may be an increment counter command, a write command, a punch out bit field, or a cryptographic command. The commands may be transmitted using a broadcast scheme or a split transaction scheme. The status of the memory modules may be determined by sampling a single signal that may be at a low, high, or intermediate voltage level.

US Patent:

20060291406, Dec 28, 2006

Filed:

Jun 23, 2005

Appl. No.:

11/166935

Inventors:

James Booth - Nicholasville KY, US
John Gostomski - Lexington KY, US

International Classification:

H04B 3/20

US Classification:

370289000, 713150000

Abstract:

A method and computer program product for selecting a secret value from a plurality of secret values, thus defining a chosen secret value. The chosen secret value is combined with a data value to generate a primary hybrid data value. The primary hybrid data value is processed to generate a processed primary hybrid data value, which is provided to a secondary device for authentication.

US Patent:

20070024471, Feb 1, 2007

Filed:

Aug 1, 2005

Appl. No.:

11/194214

Inventors:

James Booth - Nicholasville KY, US

International Classification:

H03M 7/00

US Classification:

341050000

Abstract:

A method of secure communication includes encoding a communication by separating the communication into at least two communication parts, such that each of the at least two communication parts comprises at least a portion of the communication. The communication parts may further be encoded with random or pseudo-random data. The at least two communication parts are transmitted over separate wired communication channels, and subsequently decoded to reconstruct the communication.