James Michael Fitzpatrick

US Patent:

57572941, May 26, 1998

Filed:

Dec 31, 1996

Appl. No.:

8/774412

Inventors:

Kevin D. Fisher - Palo Alto CA
James Fitzpatrick - Los Altos CA

Assignee:

Quantum Corporation - Milpitas CA

International Classification:

H03M 700

US Classification:

341 57

Abstract:

Rate 24/25 modulation encoding methods and apparatus improve efficiency in a PRML magnetic recording channel. The rate 24/25 code word uses rate 8/9 RLL encoding of one byte of user data, combined with interleaved unencoded bytes to achieve improved code rates with reasonable global run length constraint. Use of the the rate 8/9 RLL (0,3) subcode results in a rate 24/25 RLL (0,11) code, while a rate 8/9 (0,6/5) subcode results in a rate 24/25 RLL (0,14/13) code.

US Patent:

56918577, Nov 25, 1997

Filed:

Sep 29, 1995

Appl. No.:

8/536416

Inventors:

James Fitzpatrick - Mountain View CA
Xiaodong Che - Sunnyvale CA

Assignee:

Quantum Corporation - Milpitas CA

International Classification:

G11B 5596

US Classification:

360 7706

Abstract:

Determining a micro-jog parameter in a disk drive that employs a magneto-resistive (MR) transducer head assembly and a partial response (PRML) detector includes improved accuracy in measuring on-track signal strength by use of a matched filter technique. The matched filter includes circuitry for emulating a partial response signal expected to be produced by a selected test bit pattern prerecorded on the selected track. The matched filtering technique provides improved accuracy in measuring the detected signal strength as it provides an extremely narrow digital filter focused on the test bit pattern frequency. Improved determination of the micro-jog distance further includes measuring interference from adjacent tracks, the best error rate being achieved at micro-jog positions intermediate the maximum on-track signal strength and the minimum off-track interference. A novel digital detector for accurately measuring adjacent track interference also is disclosed.

US Patent:

57842965, Jul 21, 1998

Filed:

Apr 30, 1996

Appl. No.:

8/640416

Inventors:

Bill R. Baker - Redwood City CA
James Fitzpatrick - Mountain View CA

Assignee:

Quantum Corporation - Milpitas CA

International Classification:

G01B 1700

US Classification:

36455101

Abstract:

A method of performing spectral analysis of signals recorded by a magnetic recording or storage system is provided using a modified channel chip of the system. The modified channel chip enables measurement of harmonic components of the recorded signal. The recorded signal is a periodic analog signal having a period N. The method is performed by reading the recorded periodic analog signal and converting the signal into a discrete time periodic signal. The discrete time periodic signal is digitally sampled at predetermined intervals, and the digital samples are selectively accumulated in a register or registers of the channel chip. Incoming digital samples are accumulated by selectively being added to contents of the registers, or alternately being added and substracted to contents of a single register. The accumulated results represent summations used to determine harmonic coefficients of the recorded signal. The harmonic coefficients can then be used to compute a phase and amplitude for a particular harmonic k of the recorded signal.

US Patent:

56359330, Jun 3, 1997

Filed:

Jun 30, 1995

Appl. No.:

8/497182

Inventors:

James Fitzpatrick - Mountain View CA
Kelly J. Knudson - Mountain View CA

Assignee:

Quantum Corporation - Milpitas CA

International Classification:

H03M 700

US Classification:

341 58

Abstract:

A method for encoding a sequence of 16 bit digital data words into a sequence of 17 bit codewords in consonance with predetermined minimum zero run length (d), predetermined maximum zero run length (G) and maximum interleave zero run length (I) coding constraints of (d=0, G=6/I=7) for recording upon a magnetic medium within a magnetic recording channel is disclosed. The method includes dividing the 16 bit data word into an 8-bit A byte: a1, a2, a3, a4, a5, a6, a7, a8; and an 8-bit B byte b1, b2, b3, b4, b5, b6, b7, b8; separately testing the A and B bytes for violation of coding constraints, generating P and Q code bytes from the A and B bytes and inserting a center bit C of value one or zero between the P and Q code bytes to form the 17 bit codeword of a form p1, p2, p3, p4, p5, p6, p7, p8, C, q8, q7, q6, q5, q4, q3, q2, q1, in a manner minimizing hardware logic implementation.

US Patent:

46125450, Sep 16, 1986

Filed:

Jul 24, 1984

Appl. No.:

6/633823

Inventors:

Robert H. Asendorf - Los Altos CA
James P. Fitzpatrick - Santa Clara CA
Burton W. Graves - Monte Sereno CA

Assignee:

Itek Corporation - Beverly Hills CA

International Classification:

G01S 736
G01R 2316

US Classification:

343 18E

Abstract:

The invention provides a means for determining rapidly and accurately frequency information of electromagnetic radiation. It combines the operation of an Instantaneous Frequency Measurement receiver with the operation of an Instantaneous Fourier Transform receiver which utilizes a Laser-Bragg cell-photodetector array. The operational characteristics of the two receivers are such that, when they are controlled by signal processing elements, including a programmable frequency memory screen to enable or inhibit data transfers, they complement each other to provide the combined advantages of both receiver types, namely broad RF bandwidth, rapid response, ability to deal with high pulse densities, multiple CW signals, combined CW and pulse signals. The complementary IFM/IFT system operates under conditions for which either receiver operating separately would fail.

US Patent:

20170139761, May 18, 2017

Filed:

Jun 28, 2016

Appl. No.:

15/195910

Inventors:

- Plano TX, US
Nian Niles Yang - Mountain View CA, US
James Fitzpatrick - Sudbury MA, US

International Classification:

G06F 11/07

Abstract:

Systems, methods and/or devices are used to adjust error metrics for a memory portion of non-volatile memory in a storage device. In one aspect, a first write and a first read are performed on the memory portion. In accordance with results of the first read, a first error metric value for the memory portion is determined. In accordance with a determination that the first error metric value exceeds a first threshold value, an entry for the memory portion is added to a table. After the first write, when a second write to the memory portion is performed, it is determined whether the entry for the memory portion is present in the table. In accordance with a determination that the entry for the memory portion is present in the table, the second write uses a first error adjustment characteristic that is determined in accordance with the first error metric value.

US Patent:

20170084346, Mar 23, 2017

Filed:

Sep 26, 2016

Appl. No.:

15/276635

Inventors:

- Plano TX, US
Jiahui Yuan - Fremont CA, US
James Fitzpatrick - Sudbury MA, US

International Classification:

G11C 16/34
G11C 29/00
G11C 16/04
G11C 16/10
G11C 16/26
G11C 13/00

Abstract:

A three dimensional nonvolatile memory system includes a sensing unit configured to sense bit line current and/or voltage for bit lines of a plurality of separately-selectable portions of a block and to compare respective results with a reference and an adjustment unit configured to individually modify operating parameters for one or more of the plurality of separately-selectable portions in response to the comparing of respective results with the reference.