James R Fuller

US Patent:

20020100613, Aug 1, 2002

Filed:

Mar 7, 2002

Appl. No.:

10/094025

Inventors:

Donald Anstrom - Endicott NY, US
Bruce Chamberlin - Kirkwood NY, US
James Fuller - Endicott NY, US
John Lauffer - Waverly NY, US
Voya Markovich - Endwell NY, US
Douglas Powell - Endicott NY, US
Joseph Resavy - Endicott NY, US
James Stack - Endicott NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H05K003/46
H05K003/42
H05K001/03

US Classification:

174/261000, 174/255000, 029/846000

Abstract:

Conductive substructures of a multilayered laminate and associated methods of fabrication. The conductive substructures include a 0S1P substructure, a 0S3P substructure, and a 2S1P substructure, in accordance with the notation nSmP, wherein n and m are non-negative integers, wherein S stands for “signal plane,” and wherein P stands for “power plane.” A signal plane is characterized by its inclusion of a layer comprising conductive circuitry. A power plane is characterized by its inclusion of a continuously conductive layer. Thus, a 0S1P substructure includes 0 signal planes and 1 power plane (n=0, m=1). A 0S3P substructure includes 0 signal planes and 3 power plane (n=0, m=3) with a dielectric layer between each pair of power planes. A 2S1P substructure includes 2 signal planes and 1 power plane (n=2, m=1) with a dielectric layer between the power plane and each signal plane. A multilayered laminate includes a stacked substructure configuration having any combination of 0S1P, 0S3P, and 2S1P substructures with dielectric material insulatively separating the substructures from one another.

US Patent:

20040118596, Jun 24, 2004

Filed:

Dec 19, 2002

Appl. No.:

10/322527

Inventors:

James Fuller - Endicott NY, US
John Lauffer - Waverly NY, US
Voya Markovich - Endwell NY, US

Assignee:

Endicott Interconnect Technologies, Inc. - Endicott NY

International Classification:

H05K001/11

US Classification:

174/255000, 174/262000, 174/264000, 174/259000, 361/792000, 361/795000

Abstract:

A circuitized substrate assembly and method for making same wherein the assembly includes individual circuitized substrates bonded together. The substrates each include at least one opening, only one of which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

US Patent:

20040118598, Jun 24, 2004

Filed:

Mar 6, 2003

Appl. No.:

10/379575

Inventors:

James Fuller - Endicott NY, US
John Lauffer - Waverly NY, US
Voya Markovich - Endwell NY, US

Assignee:

Endicott Interconnect Technologies, Inc. - Endicott NY

International Classification:

H05K001/11

US Classification:

174/255000, 174/262000, 174/264000, 174/259000, 361/792000, 361/795000

Abstract:

An information handling system (e.g., computer, server, etc.) Utilizing at least one circuitized substrate assembly of robust construction and possessing enhanced operational capabilities. The substrate assemblies include a substrate having at least one opening which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

US Patent:

20040177998, Sep 16, 2004

Filed:

Mar 30, 2004

Appl. No.:

10/811915

Inventors:

James Fuller - Endicott NY, US
John Lauffer - Waverly NY, US
Voya Markovich - Endwell NY, US

Assignee:

Endicott Interconnect Technologies, Inc. - Endicott NY

International Classification:

H05K001/11
H01R012/04
H05K003/30

US Classification:

174/262000

Abstract:

A circuitized substrate assembly and method for making same wherein the assembly includes individual circuitized substrates bonded together. The substrates each include at least one opening, only one of which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

US Patent:

20040242270, Dec 2, 2004

Filed:

Jun 2, 2003

Appl. No.:

10/449019

Inventors:

Ashwinkumar Bhatt - Endicott NY, US
James Fuller - Endicott NY, US
James McNamara - Vestal NY, US
William Wike - Endicott NY, US

Assignee:

Endicott Interconnect Technologies, Inc. - Endicott NY

International Classification:

H04M001/00

US Classification:

455/558000

Abstract:

An electronic card which includes a thin body portion, a storage device (e.g., semiconductor chip) and an antenna. In another embodiment, the card includes the body portion, the antenna, and a recording device (e.g., magnetic stripe).

US Patent:

20050011670, Jan 20, 2005

Filed:

Aug 11, 2004

Appl. No.:

10/915483

Inventors:

James Fuller - Endicott NY, US
John Lauffer - Waverly NY, US
Voya Markovich - Endwell NY, US

Assignee:

Endicott Interconnect Technologies, Inc - Endicott NY

International Classification:

H05K001/03

US Classification:

174255000, 174260000, 174264000

Abstract:

A circuitized substrate assembly and method for making same wherein the assembly includes individual circuitized substrates bonded together. The substrates each include at least one opening, only one of which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

US Patent:

20050023035, Feb 3, 2005

Filed:

Sep 3, 2004

Appl. No.:

10/933260

Inventors:

James Fuller - Endicott NY, US
John Lauffer - Waverly NY, US
Voya Markovich - Endwell NY, US

Assignee:

Endicott Interconnect Technologies, Inc. - Endicott NY

International Classification:

H05K001/11

US Classification:

174264000

Abstract:

An information handling system (e.g., computer, server, etc.) Utilizing at least one circuitized substrate assembly of robust construction and possessing enhanced operational capabilities. The substrate assemblies include a substrate having at least one opening which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

US Patent:

20050074924, Apr 7, 2005

Filed:

Oct 7, 2003

Appl. No.:

10/679302

Inventors:

Timothy Antesberger - Binghamton NY, US
James Fuller - Endicott NY, US
John Konrad - Endicott NY, US
John Kresge - Binghamton NY, US
Stephen Krasniak - Owego NY, US
Timothy Wells - Apalachin NY, US

Assignee:

Endicott Interconnect Technologies, Inc. - Endicott NY

International Classification:

H01L021/82

US Classification:

438128000

Abstract:

A method of making a circuitized substrate in which the substrate's commoning bar, used during the plating of the circuitry on the substrate, is terminated from the various conductors using a laser. In a preferred embodiment, the laser acts through a dielectric layer (soldermask) which is applied over the circuitry, including the commoning bar and connected parts. The laser may also be used to expose selected ones of the circuit's other parts, including various pads used to accommodate a wirebond (from a chip) and also solder balls for eventual placement of the substrate on a larger circuit board.