James Evans May

US Patent:

6624998, Sep 23, 2003

Filed:

Jan 24, 2001

Appl. No.:

09/768715

Inventors:

James Thomas May - Tempe AZ
Larry Earl Tyler - Mesa AZ

Assignee:

Medtronic, Inc. - Minneapolis MN

International Classification:

H02H 322

US Classification:

361111, 361 56

Abstract:

Electrostatic Discharge (ESD) protection scheme includes a divided rail structure to route damaging ESD away from sensitive circuitry. Specifically, V and V rails are divided to segregate the ESD current within a circuit, thus isolating the sensitive circuitry from ESD exposure. In an exemplary embodiment, V is divided into V -esd and V core, while V is divided into V -esd and V core. The structure in cooperation with diodes, clamps and resistors enables to isolate the rails (V core and V core) associated with sensitive circuitry from ESD current.

US Patent:

6627917, Sep 30, 2003

Filed:

Apr 25, 2000

Appl. No.:

09/557508

Inventors:

Andreas A. Fenner - Chandler AZ
Lary R. Larson - Gold Canyon AZ
Paul F. Gerrish - Phoenix AZ
Daniel E. Fulton - Tempe AZ
James W. Bell - Chandler AZ
James Thomas May - Tempe AZ

Assignee:

Medtronic, Inc. - Minneapolis MN

International Classification:

H01L 2358

US Classification:

257 48, 257620, 257665, 257688

Abstract:

Methods and apparatus for burn-in of integrated circuit (IC) dies at the wafer level. In one embodiment, a wafer is fabricated having an array of dies formed thereon wherein the dies are separated by scribe areas. Surrounding each die is one or more ring conductors which are electrically coupled to various circuits on the die via die bond pads. The wafer further includes a series of conductive pads located in an inactive region of the wafer. Electrically connecting the conductive pads to the ring conductors is a series of redundant scribe conductors. During burn-in, a burn-in indicating apparatus located on each die monitors burn-in parameters such as elapsed burn-in time. The indicating apparatus further records the elapsed burn-in time (or other parameter). The indicating apparatus may be subsequently interrogated to verify the burn-in time.

US Patent:

6704180, Mar 9, 2004

Filed:

Apr 25, 2002

Appl. No.:

10/132756

Inventors:

Larry E. Tyler - Mesa AZ
James T. May - Tempe AZ

Assignee:

Medtronic, Inc. - Minneapolis MN

International Classification:

H02H 904

US Classification:

361 56

Abstract:

An ESD protection circuit protects circuitry internal to an integrated circuit from ESD damage to electrostatic discharge voltages occurring at one or more of the inputs of the integrated circuit while maintaining substantially zero effective capacitance at the inputs. The ESD protection circuit includes a pair of diodes of opposite conductivity coupled between at least one of the inputs of the integrated circuit and an internal node thereof for providing current paths to the operating supply rails when ESD voltages occurring at the input forward bias the diodes. A unity gain amplifier provides feedback between the input and the internal circuit node to maintain a zero voltage difference therebetween whereby the effective capacitance seen at the input is reduced to substantially zero.

US Patent:

7224560, May 29, 2007

Filed:

Feb 13, 2003

Appl. No.:

10/365791

Inventors:

James T. May - Tempe AZ, US
Larry E. Tyler - Mesa AZ, US

Assignee:

Medtronic, Inc. - Minneapolis MN

International Classification:

H02H 3/22

US Classification:

361 56, 361111

Abstract:

A protection for ICs against ESD transients includes a circuit with a master circuit driving a slave circuit. The master circuit responds to ESD voltage V(t). The slave circuit comprises parallel shunt devices having common inputs. The output of the master circuit is coupled to the common inputs. As V(t) increases the master circuit applies a portion of V(t) to the input of the slave circuit shunt devices. The threshold voltage Vt at which the slave circuit shunt devices would otherwise turn on to a lower value Vt′ closer to the holding voltage Vh of the shunt devices. All of the slave circuit devices turn on substantially simultaneously at about Vt′ close to Vh, thereby shunting the ESD transient to ground at a lower value of V(t). The master and slave circuits are inactive during normal IC operation.

US Patent:

20220386664, Dec 8, 2022

Filed:

Aug 12, 2022

Appl. No.:

17/886717

Inventors:

- Mesa AZ, US
Michael Perry May - Queen Creek AZ, US
James A. May - Mesa AZ, US

Assignee:

JAMES AND CAROL MAY FAMILY, LLLP - Mesa AZ

International Classification:

A23L 27/30
A23L 27/00

Abstract:

Various embodiments of the present technology provide compositions and methods for a sweetener composition comprising stevia leaf extract, stevia glycosides, and/or Luo Han Guo fruit extract. The sweetener composition provides enhanced taste and/or flavor properties as compared to other non-caloric or low-caloric sweeteners. The sweetener composition has a reduced aftertaste relative to stevia leaf extract and/or purified steviol glycoside. The sweetener composition may be formulated into any edible sweetened substances.

US Patent:

20200120967, Apr 23, 2020

Filed:

Dec 20, 2019

Appl. No.:

16/722135

Inventors:

- Mesa AZ, US
Michael Perry May - Queen Creek AZ, US
James A. May - Mesa AZ, US
Julian E. Zamora - Bogota, CO

Assignee:

JAMES AND CAROL MAY FAMILY, LLLP - Mesa AZ

International Classification:

A23L 27/30
A23L 29/10

Abstract:

Various embodiments of the present technology provide a sweetener composition comprising stevia glycosides that may be stably soluble in an aqueous solution, and methods for their manufacture. In various embodiments, the sweetener composition may comprise at least one stevia glycoside and a natural emulsifier. The natural emulsifier of the sweetener composition may enhance the aqueous solubility of the stevia glycoside to increase the concentration of dissolved stevia glycoside relative to its inherent aqueous solubility. The sweetener composition may be stably soluble upon formulation into any edible sweetened substances.

US Patent:

20200120968, Apr 23, 2020

Filed:

Dec 20, 2019

Appl. No.:

16/722244

Inventors:

- Mesa AZ, US
Michael Perry May - Queen Creek AZ, US
James A. May - Mesa AZ, US
Julian E. Zamora - Bogota, CO

Assignee:

JAMES AND CAROL MAY FAMILY, LLLP - Mesa AZ

International Classification:

A23L 27/30
A23L 29/10

Abstract:

Various embodiments of the present technology provide a sweetener composition comprising stevia glycosides that may be stably soluble in an aqueous solution, and methods for their manufacture. In various embodiments, the sweetener composition may comprise at least one stevia glycoside and a natural emulsifier. The natural emulsifier of the sweetener composition may enhance the aqueous solubility of the stevia glycoside to increase the concentration of dissolved stevia glycoside relative to its inherent aqueous solubility. The sweetener composition may be stably soluble upon formulation into any edible sweetened substances.

US Patent:

20200113217, Apr 16, 2020

Filed:

Dec 9, 2019

Appl. No.:

16/707103

Inventors:

- Mesa AZ, US
Michael Perry May - Queen Creek AZ, US
James A. May - Mesa AZ, US

Assignee:

JAMES AND CAROL MAY FAMILY, LLLP - Mesa AZ

International Classification:

A23L 27/30
A23L 27/00

Abstract:

Various embodiments of the present technology provide compositions and methods for a sweetener composition comprising leaf extract, glycosides, and/or Luo Han Guo fruit extract. The sweetener composition provides enhanced taste and/or flavor properties as compared to other non-caloric or low-caloric sweeteners. The sweetener composition has a reduced aftertaste relative to leaf extract and/or purified steviol glycoside. The sweetener composition may be formulated into any edible sweetened substances.