James W Y Ng

US Patent:

20200225733, Jul 16, 2020

Filed:

Mar 26, 2020

Appl. No.:

16/831004

Inventors:

- San Jose CA, US
Gaku IKEDO - Chigasaki-shi, JP
Naoyuki KAGAMI - Fujisawa-shi, JP
James Jinshi NG - Fremont CA, US
Brian Kenneth TANNER - San Jose CA, US

International Classification:

G06F 1/3296
G06F 3/06
G06F 1/3287
G11B 19/20

Abstract:

The present disclosure generally relates to an electronic circuit and method of operating thereof to back up write cache data on DDR memory in data storage devices during an emergency power off (EPO). The method involves using a power management integrated circuit (PMIC), a combo driver and one MOSFET for regulator output. The method involves detecting a voltage value that is below a predetermined threshold value, retracting a write head away from a hard disk drive (HDD), backing up data, and then resetting the HDD after the backup is complete. The backing up and retraction may occur in parallel or in sequence. The method utilizes the spindle back-electromotive force (BEMF) power to have sufficient power to make the backup. If the power from the spindle BEMF is too low, then the retraction is suspended and a high impedance is present to lighten the load until the BEMF recovers before the power on reset. As such, the back-up data is not reset and volatized by a lack of power.