James O Nicholson

US Patent:

6507392, Jan 14, 2003

Filed:

Apr 16, 2001

Appl. No.:

09/836560

Inventors:

Les H. Richards - Round Rock TX
James E. Nicholson - Austin TX

Assignee:

Bae Systems Information and Electronic Systems Integration Inc. - Nashua NH

International Classification:

G01B 1126

US Classification:

3561415, 244 316, 2502031, 25022711, 2502062, 2502082

Abstract:

One version of the invention relates to a laser detection system that includes a ball lens and a plurality of fiber optic bundles placed adjacent the ball lens so that incoming light rays are focused onto the bundles by the ball lens. In one particular version of the invention, a ball lens is one that can provide an almost infinite number of âprincipalâ axes for off-axis light. Each fiber optic bundle is aimed in a different direction from each other bundle so that each bundle will have a different FOV even though the same ball lens is used to focus the incoming light rays.

US Patent:

6807232, Oct 19, 2004

Filed:

Dec 21, 2000

Appl. No.:

09/746861

Inventors:

James Nicholson - Austin TX
Charles Schroeder - Round Rock TX
Brian Johnson - Carthage TX

Assignee:

National Instruments Corporation - Austin TX

International Classification:

H04N 712

US Classification:

37524026, 37524028

Abstract:

A system and method for multiplexing synchronous parallel digital data streams with different clock frequencies into a single data stream while preserving each data streams timing integrity. A plurality of digital data inputs and corresponding clock inputs are coupled to corresponding FIFOs (First In First Out buffers), which are coupled to a data multiplexer (MUX). Each clock input is coupled to a clock MUX which couples to each FIFO and the data MUX. Finally, a transition state machine is coupled to the clock MUX, the data MUX, and the FIFOs. Each digital data input receives a data stream from a source, such as a digital video camera, while the corresponding clock input concurrently receives a corresponding clock signal. The transition state machine controls the selection of a data stream from the MUXed data streams and the selection of the corresponding clock signal from the MUXed clock signals. The transition state machine may receive a selection signal from an external source and transmit the selection signal to the data MUX and the clock MUX, as well as the FIFOs.

US Patent:

RE41769, Sep 28, 2010

Filed:

Jan 14, 2005

Appl. No.:

11/036319

Inventors:

Les H. Richards - Round Rock TX, US
James E. Nicholson - Austin TX, US

Assignee:

BAE Systems Information and Electronic Systems Integration Inc. - Nashua NH

International Classification:

G01B 11/26
F41G 7/00
G01C 21/02
G01V 1/42

US Classification:

3561415, 244 316, 2502031, 2502062, 2502082, 25022711

Abstract:

One version of the invention relates to a laser detection system that includes a ball lens and a plurality of fiber optic bundles placed adjacent the ball lens so that incoming light rays are focused onto the bundles by the ball lens. In one particular version of the invention, a ball lens is one that can provide an almost infinite number of “principal” axes for off-axis light. Each fiber optic bundle is aimed in a different direction from each other bundle so that each bundle will have a different FOV even though the same ball lens is used to focus the incoming light rays.

US Patent:

8199695, Jun 12, 2012

Filed:

Apr 10, 2007

Appl. No.:

11/733432

Inventors:

Daniel N. de Araujo - Cedar Park TX, US
James T. Hanna - College Station TX, US
James O. Nicholson - Pflugerville TX, US
Bruce J. Wilkie - Georgetown TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04B 1/7073

US Classification:

370324, 370503, 370511, 370520, 709248

Abstract:

Methods, apparatus, and computer program products are disclosed for clock signal synchronization among computers in a network, including designating, as a primary clock signal for all the computers in a network, a clock signal from one of the computers in the network; providing the primary clock signal, simultaneously and in parallel, from the computer whose clock signal is designated as the primary clock signal to all the other computers in the network; and providing the primary clock signal, simultaneously and in parallel, from each computer in the network to all computers in the network through multiplexers and phase locked loops, with the primary clock signal locked in phase across all the computers by a phase locked loop on each computer.

US Patent:

20070124543, May 31, 2007

Filed:

Nov 28, 2005

Appl. No.:

11/287949

Inventors:

Sudhir Dhawan - , US
James Nicholson - Pflugerville TX, US

International Classification:

G06F 13/28

US Classification:

711144000

Abstract:

An apparatus, system, and method are disclosed for externally invalidating an uncertain cache line. In one embodiment, a monitor module monitors a processor module bus. A detection module detects a processor module evicting a cache line from a cache module. The cache line may be in an uncertain state. An invalidation module invalidates the cache line with an invalidation command directed to the processor module. In one embodiment, an update module updates a cache directory external to the processor module. The apparatus, system, and method increase memory and processor bandwidth by eliminating the need to snoop the processor module bus for evicted cache lines.

US Patent:

20110145676, Jun 16, 2011

Filed:

Dec 11, 2009

Appl. No.:

12/636074

Inventors:

James O. Nicholson - Pflugerville TX, US

Assignee:

ADVANCED MICRO DEVICES, INC. - Sunnyvale CA

International Classification:

H03M 13/29
G06F 11/10

US Classification:

714758, 714E11032

Abstract:

A method and device for error detection includes performing error detection for each data word received in a burst access to a memory. When no error is detected, the data words are written to a cache and indicated as valid data. In response to detecting an error in a data word, the error is corrected and the corrected data written to the cache without indicating the data as valid. In addition, the location of the detected error, indicating the data symbol associated with the error, is recorded in an error vector. The error vectors associated with each data word in the burst access are compared to determine whether a detected error was properly corrected.

US Patent:

20120203933, Aug 9, 2012

Filed:

Apr 17, 2012

Appl. No.:

13/448785

Inventors:

Daniel N. de Araujo - Cedar Park TX, US
James T. Hanna - College Station TX, US
James O. Nicholson - Pflugerville TX, US
Bruce J. Wilkie - Georgetown TX, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

G06F 1/12
G06F 15/16

US Classification:

709248

Abstract:

Methods, apparatus, and computer program products are disclosed for clock signal synchronization among computers in a network, including designating, as a primary clock signal for all the computers in a network, a clock signal from one of the computers in the network; providing the primary clock signal, simultaneously and in parallel, from the computer whose clock signal is designated as the primary clock signal to all the other computers in the network; and providing the primary clock signal, simultaneously and in parallel, from each computer in the network to all computers in the network through multiplexers and phase locked loops, with the primary clock signal locked in phase across all the computers by a phase locked loop on each computer.

US Patent:

20120262007, Oct 18, 2012

Filed:

Apr 14, 2011

Appl. No.:

13/087064

Inventors:

Alvin G. Becker - Austin TX, US
James A. Reimund - Georgetown TX, US
Naji S. Norder - Pflungerville TX, US
James E. Nicholson - Austin TX, US
Kyle R. Bryson - Austin TX, US

International Classification:

H01H 47/00

US Classification:

307113

Abstract:

A method that includes identifying a desired signal connectivity through a switch matrix, where the switch matrix includes a plurality of switching elements, and where the switching elements are selectively operable in a plurality of states to provide a plurality of signal paths for routing signals through the switch matrix. The method also includes identifying a sorting network model that corresponds to a topology of the switch matrix, applying a sorting algorithm to the sorting network model, and determining, based on the results of applying the sorting algorithm, operational states of the plurality of switching elements to provide signal paths corresponding to the desired signal connectivity.