James P Norum

US Patent:

6440813, Aug 27, 2002

Filed:

Jan 23, 2001

Appl. No.:

09/767634

Inventors:

Christopher N. Collins - Poughkeepsie NY
Harris C. Jones - Stormville NY
James P. Norum - Mount Kisco NY
Stefan Schmitz - Pleasant Valley NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 2120

US Classification:

438386, 438243, 438424, 438700

Abstract:

A trench capacitor having an increased surface area. In one embodiment, the trench capacitor is a dual trench capacitor having a first trench and a second trench wherein inner walls of the trenches electrically connect. The invention also includes a single trench capacitor wherein the trench is curved around an axis substantially perpendicular to a substrate surface.

US Patent:

7078247, Jul 18, 2006

Filed:

Jun 6, 2003

Appl. No.:

10/250144

Inventors:

Lawrence Bauer, Jr. - Pine Bush NY, US
Kenneth Giewont - Hopewell Junction NY, US
Subramanian Iyer - Mount Kisco NY, US
Bosang Kim - Mount Vernon NY, US
Jeffrey Lloyd - Poughkeepsie NY, US
Peter Locke - Hopewell Junction NY, US
James Norum - Brewster NY, US
Paul Parries - Wappingers Falls NY, US
Kent Way - Poughkeepsie NY, US
Kwong Hon Wong - Wappingers Falls NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/66
H01L 21/00
H01L 21/4763
H01L 21/44
G01R 31/26

US Classification:

438 14, 438153, 438637, 438672

Abstract:

The integrity of a liner in an interconnect structure or other layer in an integrate circuit is tested in a short time by exposing the liner to a reactive gas that attacks the underlying silicon or other material behind the liner. A weak spot in the liner permits the gas to react with the silicon, which produces a visible area that can be readily identified. The test can be performed in a few hours, in contrast to a period of several months required to complete the process, package the circuit and conduct a burn-in test.

US Patent:

7547608, Jun 16, 2009

Filed:

May 10, 2006

Appl. No.:

11/382540

Inventors:

Kangguo Cheng - Beacon NY, US
Johnathan E. Faltermeier - LaGrangeville NY, US
James P. Norum - Holmes NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/76
H01L 23/544

US Classification:

438401, 438462, 438682, 438975, 257431, 257464, 257797, 257E21165, 257E21438

Abstract:

A method is provided for forming a polysilicon layer on a substrate and aligning an exposure system with an alignment feature of the substrate through the polysilicon layer. In such method, a polysilicon layer is deposited over the substrate having the alignment feature such that the polysilicon layer reaches a first temperature. The polysilicon layer is then annealed with the substrate to raise the polysilicon layer to a second temperature higher than the first temperature. A photoimageable layer is then deposited over the polysilicon layer, after which an alignment signal including light from the alignment feature is received through the annealed polysilicon layer. Using the alignment signal passing through the annealed polysilicon layer from the alignment feature, an exposure system is aligned with the substrate with improved results.

US Patent:

7879672, Feb 1, 2011

Filed:

Feb 23, 2009

Appl. No.:

12/390739

Inventors:

Kangguo Cheng - Guilderland NY, US
Byeong Yeol Kim - Lagrangeville NY, US
James Patrick Norum - Holmes NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/8242

US Classification:

438246, 257E21653

Abstract:

A deep trench structure process for forming a deep trench in a silicon on insulator (SOI) substrate. The SOI substrate has a bulk silicon layer, a buried oxide (BOX) layer and an SOI layer. In the process, the trench fill is recessed only to a level within the SOI layer so as to avoid lateral etching of the BOX layer. The buried strap is then formed followed by the STI oxide.

US Patent:

8227311, Jul 24, 2012

Filed:

Oct 7, 2010

Appl. No.:

12/900095

Inventors:

Kangguo Cheng - Guilderland NY, US
Byeong Y. Kim - Lagrangeville NY, US
Munir D. Naeem - Poughkeepsie NY, US
James P. Norum - Holmes NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/8242

US Classification:

438243, 257E21008

Abstract:

A method of fabricating a trench capacitor is provided in which a material composition of a semiconductor region of a substrate varies in a quantity of at least one component therein such that the quantity alternates with depth a plurality of times between at least two different values. For example, a concentration of a dopant or a weight percentage of a second semiconductor material in a semiconductor alloy can alternate between with depth a plurality of times between higher and lower values. In such method, the semiconductor region can be etched in a manner dependent upon the material composition to form a trench having an interior surface which undulates in a direction of depth from the major surface of the semiconductor region. Such method can further include forming a trench capacitor having an undulating capacitor dielectric layer, wherein the undulations of the capacitor dielectric layer are at least partly determined by the undulating interior surface of the trench. Such trench capacitor can provide enhanced capacitance, and can be incorporated in a memory cell such as a dynamic random access memory (“DRAM”) cell, for example.

US Patent:

8492821, Jul 23, 2013

Filed:

Mar 30, 2012

Appl. No.:

13/434883

Inventors:

Kangguo Cheng - Guilderland NY, US
Byeong Y. Kim - Lagrangeville NY, US
Munir D. Naeem - Poughkeepsie NY, US
James P. Norum - Holmes NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 29/94

US Classification:

257301, 257E29346

Abstract:

An integrated circuit including a trench capacitor has a semiconductor region in which a material composition varies in a quantity of at least one component therein such that the quantity alternates with depth a plurality of times between at least two different values. For example, a concentration of a dopant or a weight percentage of a second semiconductor material, such as germanium, in a semiconductor alloy can alternate between with depth a plurality of times between higher and lower values. The trench capacitor has an undulating capacitor dielectric layer, wherein the undulations of the capacitor dielectric layer are at least partly determined by the undulating interior surface of the trench. Such trench capacitor can provide enhanced capacitance, and can be incorporated in a memory cell such as a dynamic random access memory (“DRAM”) cell, for example.

US Patent:

61880965, Feb 13, 2001

Filed:

Jun 9, 1999

Appl. No.:

9/328961

Inventors:

Christopher N. Collins - Poughkeepsie NY
Harris C. Jones - Stormville NY
James P. Norum - Mount Kisco NY
Stefan Schmitz - Pleasant Valley NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H02L 27108

US Classification:

257301

Abstract:

A trench capacitor having an increased surface area. In one embodiment, the trench capacitor is a dual trench capacitor having a first trench and a second trench wherein inner walls of the trenches electrically connect. The invention also includes a single trench capacitor wherein the trench is curved around an axis substantially perpendicular to a substrate surface.

US Patent:

56996799, Dec 23, 1997

Filed:

Jul 31, 1996

Appl. No.:

8/691702

Inventors:

Jin Jwang Wu - Ossining NY
William Albert Cavaliere - Verbank NY
James Patrick Norum - Millwood NY
Stefan Schmitz - Pleasant Valley NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

F25J 100

US Classification:

62617

Abstract:

A cryogenic aerosol separator/classifier for separating and selectively removing particles from a stream of aerosol. The aerosol stream is produced by a cryogenic aerosol generator comprising a reservoir containing a cryogenic gas-liquid mixture at a first pressure, a delivery line coupled to the reservoir, and a nozzle. The nozzle has at least one exit opening which allows the cryogenic gas-liquid mixture to expand from the first pressure to a lower pressure and, thus, to produce cryogenic aerosol. A separator is coupled to the nozzle, such that the light particles having high mobility are removed from the stream, thereby producing a stream of cryogenic flow with particles having a controlled size to clean a contaminated surface. The apparatus is enhanced by utilizing a magnetic field and/or specially designed flow fields to fully take advantage of the enhanced mobilities of light particles.