James L Paris

US Patent:

8516399, Aug 20, 2013

Filed:

Feb 18, 2010

Appl. No.:

12/708524

Inventors:

James M. Paris - Portland OR, US
William M. Hogan - Lake Oswego OR, US
John G. Ferguson - Tualatin OR, US

Assignee:

Mentor Graphics Corporation - Wilsonville OR

International Classification:

G06F 17/50

US Classification:

716 51, 716 56, 716136, 716137

Abstract:

A collaborative environment for performing physical verification processes on integrated circuit designs. Multiple physical verification results may be stored in a “unified” results database/directory (e. g. , unified at least from a user's perspective), where results from various verification processes, such as Design-Rule-Check (DRC) processes, Layout-Versus-Schematic comparison (LVS) processes, Design-For-Manufacturing (DFM) processes Optical Proximity Correction (OPC) processes, and Optical Rule Check (ORC) processes are accessible from the same style of user interface, which may be a graphical user interface. The basic abilities for design team-based interactions can be equally available to each process involved in the physical verification of an integrated circuit design.

US Patent:

20120047479, Feb 23, 2012

Filed:

Mar 9, 2008

Appl. No.:

12/530453

Inventors:

James M. Paris - Portland OR, US
Brian Marshall - Wilsonville OR, US
John G. Ferguson - Tualatin OR, US
Anant S. Adke - Lake Oswego OR, US

International Classification:

G06F 17/50

US Classification:

716112

Abstract:

Techniques for incrementally analyzing layout design data are disclose. With various implementations, a subsequent incremental analysis can be made for only portions of layout design data, using a subset of available analysis criteria, or some combination of both. For example, the analysis can be limited to errors identified in a previous analysis process, to changes in the layout design data made after a previous analysis process, to particular areas specified by a designer, or some combination thereof. Still further, the analysis process may be performed using only a subset of analysis criteria relevant to the portions of the design data being analyzed, a subset of the initial analysis criteria that the design data failed in a previous analysis process, a subset of the initial analysis criteria selected by the designer, or some combination thereof. Further, such an incremental analysis process can be initiated before a previous analysis process has completed.