James Peters

US Patent:

56165404, Apr 1, 1997

Filed:

Dec 2, 1994

Appl. No.:

8/349060

Inventors:

Robert D. Lithgow - Schaumburg IL
James M. Peters - Evanston IL

Assignee:

Illinois Superconductor Corporation - Evanston IL

International Classification:

H01P 1201
H01P 700
H01B 1206

US Classification:

505210

Abstract:

A filter for processing electromagnetic signals has a housing with resonators located inside the cavity of that housing. The resonators, which may be made in part from superconducting material, have rounded exterior surfaces without corners to provide a more desirable coating surface and uniform electric field around the resonators. The filter housing may be composed of a plurality of housing cells, each containing a resonator. These cells can be removably attached to other cells so that resonators may be added to or removed from the filter as may be required for a particular application.

US Patent:

20200050785, Feb 13, 2020

Filed:

Aug 10, 2018

Appl. No.:

16/100924

Inventors:

- New York NY, US
David Pflum - Elmhurst IL, US
Timothy Dockter - Elgin IL, US
James W. Peters - West Chicago IL, US
John C. Pinkowski - Carol Stream IL, US

International Classification:

G06F 21/62
G06F 17/30

Abstract:

A method includes performing by a host system processor: receiving a record insert request for a database, the record insert request comprising a primary key value and a semi-unique key value, the database comprising a record structure comprising a first primary key field, a second primary key field, and a semi-unique key field, the first primary key field comprising a flag portion for which a first flag value is indicative of the first primary key field containing a primary key and a second flag value is indicative of the first primary key field containing an alternate primary key, generating an alternate primary key value based on the primary key value and the semi-unique key value, the alternate primary key value having a portion thereof corresponding to the flag portion of the first primary key field set to the second flag value, generating a record comprising the alternate primary key value in the first primary key field, the primary key value in the second primary key field, and the semi-unique key value in the semi-unique key field, and communicating the record to the database.

US Patent:

20180190643, Jul 5, 2018

Filed:

Mar 1, 2018

Appl. No.:

15/908903

Inventors:

- Chicago IL, US
James Allan Peters - Chicago IL, US
Steve Wilton Byatt - Chicago IL, US

Assignee:

LITTELFUSE, INC. - Chicago IL

International Classification:

H01L 27/02
H01L 29/06
H01L 29/66
H01L 29/861

Abstract:

In one embodiment, an overvoltage protection device may include a semiconductor substrate comprising an n-type body region. The overvoltage protection device may further include a first p-type region disposed in a first surface region of the semiconductor substrate, and forming a first P/N junction with the n-type body region, and a second p-type region disposed in a second surface region of the semiconductor substrate opposite the first surface, and forming a second P/N junction with the n-type body region, wherein the n-type body region, first p-type region, and second p-type region form a breakdown device having a breakdown voltage greater than 100V when an external voltage is applied between the first surface region and second surface region.

US Patent:

20160293591, Oct 6, 2016

Filed:

Apr 3, 2015

Appl. No.:

14/678005

Inventors:

- Chicago IL, US
James Allan Peters - Chicago IL, US
Steve Wilton Byatt - Chicago IL, US

Assignee:

LITTELFUSE, INC. - Chicago IL

International Classification:

H01L 27/02
H01L 29/66

Abstract:

In one embodiment, an overvoltage protection device may include a semiconductor substrate comprising an n-type body region. The overvoltage protection device may further include a first p-type region disposed in a first surface region of the semiconductor substrate, and forming a first P/N junction with the n-type body region, and a second p-type region disposed in a second surface region of the semiconductor substrate opposite the first surface, and forming a second P/N junction with the n-type body region, wherein the n-type body region, first p-type region, and second p-type region form a breakdown device having a breakdown voltage greater than 100 V when an external voltage is applied between the first surface region and second surface region.