James K Schaeffer

US Patent:

7120353, Oct 10, 2006

Filed:

Feb 20, 2002

Appl. No.:

10/079397

Inventors:

Bernarr C. Schaeffer - Rosendale NY, US
James Schaeffer - Rosendale NY, US
Wayne Schaeffer - Stone Ridge NY, US

International Classification:

A21B 2/00

US Classification:

392416, 392435, 392436, 392437, 219530, 219531, 219539, 219540

Abstract:

A portable compact sauna wherein a user's body is warmed to sweating primarily by direct absorption of infrared radiation. Broad infrared radiation emitters or sources are placed around the inside of a narrow cabinet so as to be in close proximity to various parts of a seated user. Fins spaced apart less than finger-width on the emitters protect the user from contact with elevated temperatures in the emitters. The emitters, which lend themselves to easy cleaning, are heated by electric infrared heaters having a unique design which eliminates extremely-low-frequency (ELF) electromagnetic field (ELF) normally generated by AC energized electrical heater elements, to provide low extremely-low frequency EMF saunas able to utilize conventional-commercial electrical-energy sources. The emitters protect the heaters. Power wires for the heaters are arranged for low ELF EMF emission, too.

US Patent:

7142779, Nov 28, 2006

Filed:

Mar 3, 2004

Appl. No.:

10/792203

Inventors:

Bernarr C. Schaeffer - Rosendale NY, US
James Schaeffer - Rosendale NY, US
Wayne Schaeffer - Stone Ridge NY, US

International Classification:

A21B 2/00

US Classification:

392416, 219215

Abstract:

A portable compact sauna wherein a user's body is warmed to sweating primarily by direct absorption of infrared radiation. Broad infrared radiation emitters or sources are placed around the inside of a narrow cabinet so as to be in close proximity to various parts of a seated user. Fins spaced apart less than finger-width on the emitters protect the user from contact with elevated temperatures in the emitters. The emitters, which lend themselves to easy cleaning, are heated by electric infrared heaters having a unique design which eliminates extremely-low-frequency (ELF) electromagnetic field (EMF) normally generated by AC energized electrical heater elements, to provide low extremely-low frequency EMF saunas able to utilize conventional-commercial electrical-energy sources. The emitters protect the heaters. Power wires for the heaters are arranged for low ELF EMF emission, too.

US Patent:

7445981, Nov 4, 2008

Filed:

Jun 29, 2007

Appl. No.:

11/771690

Inventors:

Gauri V. Karve - Fishkill NY, US
Cristiano Capasso - Austin TX, US
Srikanth B. Samavedam - Fishkill NY, US
James K. Schaeffer - Wappingers Falls NY, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 21/8238

US Classification:

438199, 257369

Abstract:

A method includes forming a first gate dielectric layer over a semiconductor layer having a first and a second well region, forming a first metal gate electrode layer over the first gate dielectric, forming a sidewall protection layer over the first metal gate electrode layer and adjacent sidewalls of the first gate dielectric layer and first metal gate electrode layer, forming a channel region layer over the second well region, forming a second gate dielectric layer over the channel region layer, forming a second metal gate electrode layer, and forming a first gate stack including a portion of each of the first gate dielectric layer and first metal gate electrode layer over the first well region and forming a second gate stack including a portion of each of the second gate dielectric layer and second metal gate electrode layer over the channel region layer and over the second well region.

US Patent:

7666730, Feb 23, 2010

Filed:

Jun 29, 2007

Appl. No.:

11/771721

Inventors:

Gauri V. Karve - Fishkill NY, US
Cristiano Capasso - Austin TX, US
Srikanth B. Samavedam - Fishkill NY, US
James K. Schaeffer - Wappingers Falls NY, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 21/8238

US Classification:

438199, 438195, 438197, 438275, 438283, 257E21637

Abstract:

A method for forming a semiconductor structure includes forming a channel region layer over a semiconductor layer where the semiconductor layer includes a first and a second well region, forming a protection layer over the channel region layer, forming a first gate dielectric layer over the first well region, forming a first metal gate electrode layer over the first gate dielectric, removing the protection layer, forming a second gate dielectric layer over the channel region layer, forming a second metal gate electrode layer over the second gate dielectric layer, and forming a first gate stack including a portion of each of the first gate dielectric layer and the first metal gate electrode layer over the first well region and forming a second gate stack including a portion of each of the second gate dielectric layer and the second metal gate electrode layer over the channel region layer.

US Patent:

7691701, Apr 6, 2010

Filed:

Jan 5, 2009

Appl. No.:

12/348332

Inventors:

Michael P. Belyansky - Bethel CT, US
Siddarth A. Krishnan - Peekskill NY, US
Unoh Kwon - Fishkill NY, US
Naim Moumen - Walden NY, US
Ravikumar Ramachandran - Pleasantville NY, US
James Kenyon Schaeffer - Wappingers Falls NY, US
Richard Wise - Newburgh NY, US
Keith Kwong Hon Wong - Wappingers Falls NY, US
Hongwen Yan - Somers NY, US

Assignee:

International Business Machines Corporation - Armonk NY
Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 21/00

US Classification:

438229, 438275, 438592, 257E2163

Abstract:

Embodiments of the present invention provide a method of forming gate stacks for field-effect-transistors. The method includes forming a metal-containing layer directly on a first titanium-nitride (TiN) layer, the first TiN layer covering areas of a semiconductor substrate designated for first and second types of field-effect-transistors; forming a capping layer of a second TiN layer on top of the metal-containing layer; patterning the second TiN layer and the metal-containing layer to cover only a first portion of the first TiN layer, the first portion of the first TiN layer covering an area designated for the first type of field-effect-transistors; etching away a second portion of the first TiN layer exposed by the patterning while protecting the first portion of the first TiN layer, from the etching, through covering with at least a portion of thickness of the patterned metal-containing layer; and forming a third TiN layer covering an areas of the semiconductor substrate designated for the second type of field-effect-transistors.

US Patent:

7910442, Mar 22, 2011

Filed:

Jul 24, 2007

Appl. No.:

11/782319

Inventors:

Cristiano Capasso - Austin TX, US
Srikanth B. Samavedam - Fishkill NY, US
James K. Schaeffer - Wappingers Falls NY, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 21/8234

US Classification:

438275, 438706, 438745, 257E21396

Abstract:

A method including partially etching a first portion of a first layer, wherein the first layer is a conductive layer, is provided. The method further includes removing at least a portion of a second layer. The method further includes completing etching of said first portion of the conductive layer so that said first portion of the conductive layer is removed. The method further includes completing formation of the semiconductor device.

US Patent:

8114739, Feb 14, 2012

Filed:

Sep 28, 2009

Appl. No.:

12/568412

Inventors:

Murshed M. Chowdhury - Newburgh NY, US
James K. Schaeffer - Wappingers Falls NY, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 21/336

US Classification:

438258, 438 57, 438176, 438195, 438197, 438200, 438240, 438279, 438283, 438770, 438778, 257391, 257395, 257406, 257410, 257499, 257E21054, 257E21182, 257E21191, 257E21207, 257E21224

Abstract:

Methods are provided for fabricating a transistor. An exemplary method involves depositing an oxide layer overlying a layer of semiconductor material, forming an oxygen-diffusion barrier layer overlying the oxide layer, forming a layer of high-k dielectric material overlying the oxygen-diffusion barrier layer, forming a layer of conductive material overlying the layer of high-k dielectric material, selectively removing portions of the layer of conductive material, the layer of high-k dielectric material, the oxygen-diffusion barrier layer, and the oxide layer to form a gate stack, and forming source and drain regions about the gate stack. When the conductive material is an oxygen-gettering conductive material, the oxygen-diffusion barrier layer prevents diffusion of oxygen from the deposited oxide layer to the oxygen-gettering conductive material.

US Patent:

20010001030, May 10, 2001

Filed:

Dec 21, 2000

Appl. No.:

09/746995

Inventors:

James Schaeffer - Englewood CO, US
Roger Randall - Parker CO, US
John Edwards - Franktown CO, US
Brian Huffman - Windsor CO, US
Jack Crosby - Brighton CO, US
Paul Svaldi - Golden CO, US
Robert Hunsicker - Largo FL, US
Michael Urbas - Cleveland Heights OH, US

Assignee:

Interstate Highway Construction

International Classification:

E01C019/42
E01C019/18

US Classification:

404/075000, 404/102000, 404/108000

Abstract:

Apparatus and methods are provided for filling a groove in a pavement with a groove filling grout. The present invention is particularly useful for forming long-lasting pavement markings, such as lane striping.