James C Webster

US Patent:

6442216, Aug 27, 2002

Filed:

Mar 4, 1998

Appl. No.:

09/034281

Inventors:

Kevin McLaughlin - Lake Worth FL
James Rodney Webster - Manitou Springs CO
Manbir Nag - Coral Springs FL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03D 300

US Classification:

375322, 375329, 329304

Abstract:

A digital demodulator ( ) includes a differentiate and cross multiply stage ( ) and a plurality of filter/decimator stages ( and and ) that accept both multiple baud rates and multiple modulation deviation frequencies, and that provide a common frequency data stream at their respective outputs. One of said filter/decimator stages is coupled to a primary filter ( ) which is followed by a box filter ( ). The box filter ( ) improves the overall filter response and provides notches at a specified frequency (e. g. , 4800 Hz) and its harmonics. Demodulator ( ) provides improved sensitivity without the need for any circuit trimming. The filter stages (e. g. , and ) used in demodulator ( ) have been optimized to eliminate the need for costly multipliers.

US Patent:

61309214, Oct 10, 2000

Filed:

Dec 23, 1997

Appl. No.:

8/996900

Inventors:

Clinton C Powell - Lake Worth FL
James Rodney Webster - Colorado Springs CO

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04L 2706

US Classification:

375344

Abstract:

A method (900) and circuit (400) for automatic frequency correcting a frequency modulated (FM) digital signal determines a frequency offset value of the detected FM signal during a preamble portion of the FM digital signal, generates an offset corrected signal by removing the frequency offset value from a detected FM signal (440), and generates a frequency corrected signal (460). The frequency corrected signal is generated by selecting the offset corrected signal during the preamble portion, selecting the detected FM signal after the end of the preamble portion when a magnitude of the frequency offset value of the detected FM signal is below a predetermined threshold (445), and otherwise selecting the offset corrected signal after the end of the preamble portion.

US Patent:

60849312, Jul 4, 2000

Filed:

Oct 31, 1997

Appl. No.:

8/962267

Inventors:

Clinton C. Powell - Lake Worth FL
James M. Keba - Wellington FL
James R. Webster - Boynton Beach FL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04L 700

US Classification:

375355

Abstract:

A symbol synchronizer (10) for use in a communication device. The symbol synchronizer (10) comprises a sampling circuit (100) which samples the demodulated signal at a plurality of sampling events for each symbol period to generate three sample values at each sampling event. An eye pattern detector circuit (200) generates eye pattern characteristic information based on the three sample values, and outputs a symbol pulse in response to detecting eye pattern characteristic information consistent with a symbol center. A synchronization noise mask circuit (400) filters symbol pulses that occur during a predetermined period of time after a first symbol pulse is detected for each symbol period. A synchronization adjust circuit (500) generates a synchronization pulse during each symbol period at a particular instant of time during the symbol period based on a history of the occurrences of symbol pulses for a current symbol period and for prior symbol periods.