Jason Kyle Chang

US Patent:

6915323, Jul 5, 2005

Filed:

Feb 13, 2003

Appl. No.:

10/368023

Inventors:

Jason Chang - Fremont CA, US
Satwant Singh - Fremont CA, US
Ju Shen - Saratoga CA, US

Assignee:

Lattice Semiconductor Corporation - Hillsboro OR

International Classification:

G06F007/50

US Classification:

708707

Abstract:

A programmable logic device includes a plurality of logic blocks. Each logic block includes a plurality of macrocells, with each macrocell being configurable to register a sum of product term output. In addition, the macrocells within each logic block are arranged from a first macrocell to a last macrocell. Each macrocell is associated with a carry-in and a carry-out signal. The macrocells are configured to support a carry cascade such that the carry-out signal from the first macrocell becomes the carry-in signal for the second macrocell, and so on.

US Patent:

20170313740, Nov 2, 2017

Filed:

Apr 27, 2017

Appl. No.:

15/499793

Inventors:

- Menlo Park CA, US
Jason CHANG - Palo Alto CA, US
Dario SLAVAZZA - Fremont CA, US
Heng Wei CHANG - Foster City CA, US

International Classification:

C07K 1/04
C07K 14/00

Abstract:

The present invention provides methods of preparing a peptide having an N-terminal histidine, and compositions comprising a plurality of peptides prepared by the methods. The methods disclosed herein reduce racemization of the N-terminal histidine in the peptides during the synthesis process, thereby improving the yield and purity of the peptide compositions. Exemplary peptides that can be manufactured with the methods include Exenatide, Lixisenatide, and Liraglutide.