Jason C Chen

US Patent:

6646343, Nov 11, 2003

Filed:

Jun 14, 2002

Appl. No.:

10/173210

Inventors:

Nirmal Sharma - Fremont CA
Ge Gong - Santa Clara CA
Jason Chen - San Jose CA

Assignee:

BitBlitz Communications, Inc. - Milpitas CA

International Classification:

H01L 2334

US Classification:

257728, 257786, 257691

Abstract:

A method and an integrated circuit package support a high-speed integrated circuit operating at 10 GHz or higher switching speeds. The packaged integrated circuit has external terminals, a semiconductor die having conventional bonding pads, a substrate (e. g. , printed circuit board) having conductive traces to couple input, output or bi-directional signals between bonding finger areas of the conductive traces and the external terminals. A ground plate that is electrically isolated from a conductive trace is positioned in the vicinity of the bonding finger area of the conductive trace. Bond wires connect the bonding pads of the electronic circuit and the bonding finger areas of the conductive traces. The ground plate improves integrity in a high-speed signal by canceling the complex impedance of a bond wire. In addition, the packaged integrated circuit can use multiple bond wires to connect the same bonding finger area of a conductive trace on the substrate and a corresponding bonding pad of the electronic circuit.

US Patent:

6772409, Aug 3, 2004

Filed:

Mar 2, 1999

Appl. No.:

09/260121

Inventors:

Sachinder S. Chawla - San Francisco CA
Jason Chen - Fremont CA
Alex Gorelik - Fremont CA
Hon C. Thio - Castro Valley CA
Dave Wang - San Jose CA

Assignee:

ACTA Technologies, Inc. - Palo Alto CA

International Classification:

G06F 944

US Classification:

717106, 717117, 717137

Abstract:

A method of generating procedural language code for extracting data from a data warehouse comprising the steps of accepting a declarative specification and generating procedural language code to execute the declarative specification.

US Patent:

D511374, Nov 8, 2005

Filed:

Sep 28, 2004

Appl. No.:

29/214051

Inventors:

Jason Chen - Hayward CA, US

International Classification:

2302

US Classification:

D232931

US Patent:

7320122, Jan 15, 2008

Filed:

May 25, 2004

Appl. No.:

10/854287

Inventors:

Sachinder S. Chawla - San Francisco CA, US
Jason Chen - Fremont CA, US
Alexander Gorelik - Fremont CA, US
Hon C. Thio - Castro Valley CA, US
Dave Wang - San Jose CA, US

Assignee:

Business Objects Data Integration - San Jose CA

International Classification:

G06F 9/44

US Classification:

717109, 717107, 717108, 717117

Abstract:

A method of generating procedural language code for extracting data from a data warehouse comprising the steps of accepting a declarative specification and generating procedural language code to execute the declarative specification.

US Patent:

7411293, Aug 12, 2008

Filed:

Jun 14, 2006

Appl. No.:

11/452805

Inventors:

Ben Wei Chen - Fremont CA, US
David Hong-Dien Chen - Irvine CA, US
Jason Jajen Chen - Walnut CA, US

Assignee:

Kingston Technology Corporation - Fountain Valley CA

International Classification:

H01L 23/48
H01L 23/52
H01L 29/40

US Classification:

257724, 257777

Abstract:

A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.

US Patent:

7411424, Aug 12, 2008

Filed:

Apr 10, 2006

Appl. No.:

11/400924

Inventors:

Donghui Li - Palo Alto CA, US
Jack Zezhong Peng - San Jose CA, US
Jason Chen - Santa Clara CA, US

Assignee:

KLP International, Ltd. - Santa Clara CA

International Classification:

H03K 19/20

US Classification:

326113, 326 38, 326106

Abstract:

Methods and apparatus are disclosed to implement programmable logic generators that provide the advantages of compatible look-up tables (LUTs) while utilizing less silicon real estate and power for the same number of functions. The disclosed methods and apparatus employ programmable switches to emulate memory units that are used in LUTs and illustrate construction of 2- and 3-input LUTs as building blocks of other multi-input LUTs.

US Patent:

7558947, Jul 7, 2009

Filed:

Dec 31, 2001

Appl. No.:

10/038431

Inventors:

Sushma Shrikant Trivedi - Sunnyvale CA, US
Joseph P. Bratt - San Jose CA, US
Vaughn Todd Arnold - Scotts Valley CA, US
William C. Athas - San Jose CA, US
Jason Chen - Lafayette CA, US

Assignee:

Apple Inc. - Cupertino CA

International Classification:

G06F 7/38

US Classification:

712222

Abstract:

Methods and apparatuses for computing an absolute difference of two vectors of numbers. In one aspect of the invention, a method for execution by a microprocessor in response to receiving a single instruction includes: receiving a first plurality of numbers and a second plurality of numbers; and generating simultaneously a third plurality of numbers, each of which is an absolute difference between a number in the first plurality of numbers and a number in the second plurality of numbers. The above operations are performed in response to the microprocessor receiving the single instruction.

US Patent:

7659610, Feb 9, 2010

Filed:

Jul 29, 2008

Appl. No.:

12/181721

Inventors:

Ben Wei Chen - Fremont CA, US
David Hong-Dien Chen - Irvine CA, US
Jason Japen Chen - Walnut CA, US

Assignee:

Kingston Technology Corporation - Fountain Valley CA

International Classification:

H01L 23/02

US Classification:

257686, 257777, 257724

Abstract:

A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.