Jason J Gomez

US Patent:

8570687, Oct 29, 2013

Filed:

May 25, 2012

Appl. No.:

13/481530

Inventors:

Martin John McCaslin - Pleasanton CA, US
Visit Thaveeprungsriporn - Bangkok, TH
Alex Enriquez Cayaban - Fremont CA, US
Jason Aquinde Gomez - Santa Clara CA, US

Assignee:

Nitto Denko Corporation - Osaka

International Classification:

G11B 5/48
G11B 21/08

US Classification:

3602459

Abstract:

Disclosed are various techniques for reduction of the magnitude of the residual stress in the HDD gimbal circuits, or more specifically, the residual plastic strain. Various trace structures of the gimbal circuits as well as stress suppressors are utilized to achieve the reduction of the residual stress in the circuit.

US Patent:

20100046351, Feb 25, 2010

Filed:

Jun 30, 2009

Appl. No.:

12/495323

Inventors:

Martin John MCCASLIN - Pleasanton CA, US
Visit THAVEEPRUNGSRIPORN - Bangkok, TH
Alex Enriquez CAYABAN - Fremont CA, US
Jason Aquinde GOMEZ - Santa Clara CA, US

Assignee:

NITTO DENKO CORPORATION - Osaka

International Classification:

G11B 17/00

US Classification:

3692471, G9B 17

Abstract:

Disclosed are various techniques for reduction of the magnitude of the residual stress in the HDD gimbal circuits, or more specifically, the residual plastic strain. Various trace structures of the gimbal circuits as well as stress suppressors are utilized to achieve the reduction of the residual stress in the circuit.

US Patent:

20100091048, Apr 15, 2010

Filed:

Oct 14, 2009

Appl. No.:

12/579261

Inventors:

Andrew P. Aitken - Cupertino CA, US
Paolo Sacchetto - Cupertino CA, US
Jason Gomez - Cupertino CA, US
David Lum - Cupertino CA, US

Assignee:

Apple Inc. - Cupertino CA

International Classification:

G06F 3/038
G09G 5/10

US Classification:

345690, 345213

Abstract:

An apparatus for controlling backlighting of an electronic display, such as a liquid crystal display (LCD) panel. The apparatus may synchronize a power cycle of one or more light-emitting diode (LED) strings to a frame rate of the LCD panel.

US Patent:

62751069, Aug 14, 2001

Filed:

Feb 25, 2000

Appl. No.:

9/511877

Inventors:

Jason N. Gomez - Campbell CA

Assignee:

Spectrian Corporation - Sunnyvale CA

International Classification:

H03F 100
H03F 126

US Classification:

330151

Abstract:

A carrier cancellation combiner, and pre-distortion and feed-forward loops of an RF power amplifier are controlled to minimize IMD components at the output of the RF amplifier, by a spectral distortion measurement scheme that performs Fast Fourier Transform (FFT)-based spectral power measurements at a `reference` signal port (associated with the RF input signal), and a plurality of `test` signal ports (associated with various monitoring locations of the amplifier). Signals extracted from the control and test ports are downconverted to baseband, bandpass filtered, digitized and stored as a spectral `snapshot` of the entire band of the signal infrastructure of the amplifier. A digital signal processor-based controller processes the buffered data to produce averaged FFT's of the data extracted from the reference and test ports and thereby provide spectral information for each sampled signal set. The FFT for the control data is processed to establish a baseline, with which the FFTs for the test data are compared, to generate adjustment signals for control parameters through which IMD components introduced by the amplifier may be minimized.

US Patent:

20220327977, Oct 13, 2022

Filed:

Feb 24, 2022

Appl. No.:

17/680103

Inventors:

- Cupertino CA, US
Jason N. Gomez - Campbell CA, US
David A. Hartley - Santa Cruz CA, US
Chengrui Le - San Jose CA, US
Paolo Sacchetto - Cupertino CA, US
Arthur L. Spence - San Jose CA, US

International Classification:

G09G 3/20

Abstract:

In an embodiment, an electronic device includes an electronic display. The electronic display provides a programmable latency period in response to receiving a first image frame corresponding to first image frame data. The electronic display also displays the first image frame after the programmable latency period and during display of the first image frame, receives a second image frame corresponding to second image frame data. The electronic display also repeats display of the first image frame in response to receiving the second image frame.

US Patent:

20180350313, Dec 6, 2018

Filed:

Aug 14, 2018

Appl. No.:

16/103852

Inventors:

- Cupertino CA, US
Jason N. GOMEZ - Campbell CA, US
Fenghua ZHENG - San Jose CA, US
Paolo SACCHETTO - Cupertino CA, US
Sandro H. PINTZ - Menlo Park CA, US
Taesung KIM - Los Altos CA, US
Christopher P. TANN - San Jose CA, US
Marc ALBRECHT - San Francisco CA, US
David W. LUM - Cupertino CA, US

International Classification:

G09G 3/36
G06T 1/20

Abstract:

The disclosure describes procedures for dynamically employing a variable refresh rate at an LCD display of a consumer electronic device, such as a laptop computer, a tablet computer, a mobile phone, or a music player device. In some configurations, the consumer electronic device can include a host system portion, having one or more processors and a display system portion, having a timing controller, a buffer circuit, a display driver, and a display panel. The display system can receive image data and image control data from a GPU of the host system, evaluate the received image control data to determine a reduced refresh rate (RRR) for employing at the display panel, and then transition to the RRR, whenever practicable, to conserve power. In some scenarios, the transition to the RRR can be a transition from a LRR of 50 hertz or above to a RRR of 40 hertz or below.

US Patent:

20170047027, Feb 16, 2017

Filed:

Oct 28, 2016

Appl. No.:

15/338297

Inventors:

- Cupertino CA, US
Jason N. GOMEZ - Campbell CA, US
Fenghua ZHENG - San Jose CA, US
Paolo SACCHETTO - Cupertino CA, US
Sandro H. PINTZ - Menlo Park CA, US
Taesung KIM - Los Altos CA, US
Christopher P. TANN - San Jose CA, US
Marc ALBRECHT - San Francisco CA, US
David W. LUM - Cupertino CA, US

International Classification:

G09G 3/36
G06T 1/20

Abstract:

The disclosure describes procedures for dynamically employing a variable refresh rate at an LCD display of a consumer electronic device, such as a laptop computer, a tablet computer, a mobile phone, or a music player device. In some configurations, the consumer electronic device can include a host system portion, having one or more processors and a display system portion, having a timing controller, a buffer circuit, a display driver, and a display panel. The display system can receive image data and image control data from a GPU of the host system, evaluate the received image control data to determine a reduced refresh rate (RRR) for employing at the display panel, and then transition to the RRR, whenever practicable, to conserve power. In some scenarios, the transition to the RRR can be a transition from a LRR of 50 hertz or above to a RRR of 40 hertz or below.

US Patent:

20150049275, Feb 19, 2015

Filed:

Aug 15, 2013

Appl. No.:

13/968254

Inventors:

- Cupertino CA, US
Dinesh C. Mathew - Fremont CA, US
Eric L. Benson - San Francisco CA, US
Jason N. Gomez - Campbell CA, US
Jun Qi - Cupertino CA, US
Robert Y. Cao - San Francisco CA, US
Victor H. Yin - Cupertino CA, US
Christiaan A. Ligtenberg - San Carlos CA, US
Wey-Jiun Lin - Los Altos Hills CA, US

Assignee:

Apple Inc. - Cupertino CA

International Classification:

G06F 1/16
G02F 1/1368
G02F 1/133

US Classification:

349 42, 349 58, 36167928

Abstract:

An electronic device may have a housing with a lid that rotates relative to a base. A display in the lid may have a thin-film transistor layer. Display driver circuitry may be mounted to the thin-film transistor layer. A display timing controller integrated circuit may be mounted in the base. A rigid flex printed circuit may have a rigid portion in the base to which the display timing controller integrated circuit is mounted and may have a rigid portion in the lid. A flexible printed circuit portion of the rigid flex printed circuit may be used to couple the rigid printed circuit portion in the lid to the thin-film transistor layer. A flexible printed circuit portion of the rigid flex printed circuit that extends between the lid and the base may be formed from a double-shield-layer single-signal-line-layer flexible printed circuit.