Jason Marcus Jacobs

US Patent:

6715094, Mar 30, 2004

Filed:

Dec 20, 2000

Appl. No.:

09/747617

Inventors:

Jason Jacobs - Orangevale CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 112

US Classification:

713400, 713600, 710 58, 710105

Abstract:

A multi-mode I/O interface includes a transmit state machine receiving a core clock signal, a control clock signal and a transmit signal. The state machine generates a state signal indicating a state of the I/O interface in a next clock cycle. A pattern generator includes pattern generation units. Each pattern generation unit selects, in response to the state signal and an I/O protocol signal, N-bit interface control patterns from a plurality of microcode N-bit interface control patterns contained in the pattern generation units. A serialization unit then serializes the selected N-bit interface control patterns. A synchronization unit synchronizes the control patterns into a control clock domain to form interface control signals generated by the multi-mode I/O interface. The interface control signals are transmitted to data buffers and strobe buffers to enable transmission and receipt of data in accordance with an I/O protocol indicated by the I/O protocol signal.

US Patent:

7159135, Jan 2, 2007

Filed:

Jan 12, 2004

Appl. No.:

10/756025

Inventors:

Jason Jacobs - Orangevale CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/12

US Classification:

713400, 713600

Abstract:

In some embodiments, a method and apparatus for a multi-mode I/O interface are described. In one embodiment, the interface includes a transmit state machine that generates a state signal indicating a state of the I/O interface in a next clock cycle. A pattern generator includes pattern generation units that select, in response to the state signal and an I/O protocol signal, N-bit interface control patterns from a plurality of microcode N-bit interface control patterns contained in the pattern generation units. A serialization unit then serializes the selected N-bit interface control patterns. A synchronization unit synchronizes the control patterns into a control clock domain to form interface control signals that are transmitted to data buffers and strobe buffers to enable transmission and receipt of data in accordance with an I/O protocol indicated by the I/O protocol signal. Other embodiments are described and claimed.