Jason D Morgan

US Patent:

6631178, Oct 7, 2003

Filed:

Jan 12, 2001

Appl. No.:

09/760106

Inventors:

Steven R. Blackwell - Huntsville AL
Richard L. Goodson - Huntsville AL
Jason N. Morgan - Madison AL
Ayman Ghobrial - Huntsville AL

Assignee:

Adtran, Inc. - Huntsville AL

International Classification:

H04M 124

US Classification:

379 104, 379 24, 379 2701, 379 28, 375219, 375224, 375295

Abstract:

A system and method for transmitting data over a twisted pair with or without load coils using a transmitter and receiver is disclosed. The system detects load coils by generating and transmitting a test signal having signal power concentrated in two different frequency bands across the twisted pair and comparing the signal power of the received signal to determine whether the twisted pair is loaded or unloaded. If load coils are detected, an adjustment circuit is used to configure the receiver for reception of data over a twisted pair having load coils. Otherwise, the adjustment circuit configures the receiver for reception of data over a twisted pair without load coils.

US Patent:

6728649, Apr 27, 2004

Filed:

Feb 1, 2002

Appl. No.:

10/061848

Inventors:

Dennis B. McMahan - Huntsville AL
Jason N. Morgan - Madison AL
Timothy D. Rochell - Elkmont AL

Assignee:

ADTRAN, Inc. - Huntsville AL

International Classification:

H03B 100

US Classification:

702 79, 702191

Abstract:

A method and apparatus for removing glitches, interference or noise from a clock signal are provided by the present invention. In accordance with the invention, a glitch-ridden clock signal is monitored to determine when a transition in the glitch ridden clock signal occurs. When a transition occurs, a counter is initiated in accordance with a second high-speed clock signal. The value of this counter is compared to a compare value. The compare value is selected to approximately equal the expected period of the glitch-ridden clock signal. If the counter value equals the compare value, it is assumed that the transition was a valid transition and the transition is carried through and output as a glitch-free clock signal. However, if a transition occurs before the count value equals the counter compare value, it is assumed that the transition is invalid and no transition is carried to the glitch-free clock output. Thus, the present invention removes glitches from a received clock signal and outputs a glitch-free clock signal.

US Patent:

7103322, Sep 5, 2006

Filed:

Oct 5, 2001

Appl. No.:

09/971413

Inventors:

David Eric Jones - Huntsville AL, US
Jason N. Morgan - Madison AL, US
Stacy Morris Murphree - Harvest AL, US
Jason Ted Brock - New Market AL, US

Assignee:

Adtran, Inc. - Huntsville AL

International Classification:

H04B 1/17
H04B 1/38
H04B 17/00
H04Q 7/20

US Classification:

455 90, 455 6711, 455 903, 4551151, 4552261, 455423

Abstract:

A (DS3) network interface unit (NIU) by-pass architecture places the NIU on its own circuit card and exclusive of by-pass switching (and relay) components, which are installed in the equipment shelf, proper, so that physical removal of the NIU card will leave the by-pass circuitry intact. The by-pass circuit responds to an abnormality of the NIU card, such as malfunction or physical removal of the NIU from its card slot, and also to a power supply failure. It also contains an indicator to draw attention to a failed NIU, increasing the likelihood that someone will notice a damaged card.

US Patent:

7512121, Mar 31, 2009

Filed:

Feb 18, 2005

Appl. No.:

11/060866

Inventors:

Jason N. Morgan - Brownsboro AL, US
Andrew T. Ruble - Harvest AL, US

Assignee:

Adtran, Inc. - Huntsville AL

International Classification:

H04L 12/50
H04J 3/06

US Classification:

370358, 370522, 370535

Abstract:

An alarm indication translation mechanism in a digital access and cross-connect system monitors all incoming tributary DS streams for the presence of an alarm indication. Whenever an alarm indication is detected in a fractional tributary DS data stream, all DS bytes within the T stream containing that tributary DS data stream include the detected alarm indication. For a Yellow alarm, this means that for the case of D4 superframe format (SF), the second most significant bit of each of the twenty-four bytes of a T frame containing at least one fractional DS carrying alarm information is set to a ‘0’, irrespective of whether the bytes are valid DSs or idle bytes. For extended superframe format (ESF), Yellow alarm is transmitted by sending a repetitive sixteen bit pattern consisting of eight marks or ‘1’s, followed by eight spaces or ‘0’s in the data link.

US Patent:

8442074, May 14, 2013

Filed:

Apr 2, 2008

Appl. No.:

12/061480

Inventors:

Richard Goodson - Huntsville AL, US
Stacy Murphree - Harvest AL, US
Jason Morgan - Brownsboro AL, US
Stuart Venters - Huntsville AL, US

Assignee:

ADTRAN, Inc. - Huntsvillle AL

International Classification:

H04J 3/06

US Classification:

370503

Abstract:

The present disclosure generally pertains to systems and methods for passing timing information over packet networks. In one exemplary embodiment of the present disclosure, a transmitter inserts a timestamp into various packets being transmitted. A receiver determines the packet delay for each of these packets. The receiver monitors the packet delays of received packets over time to estimate a minimum packet delay for the network. Thereafter, the receiver uses the timestamps of received packets in order to update a local receiver clock signal so that the local receiver clock signal is synchronous to the clock signal used by the transmitter to generate the timestamps. However, the receiver filters the received timestamps such that the effects of packet delay variation to the synchronization of the local clock signals are reduced.

US Patent:

52455564, Sep 14, 1993

Filed:

Sep 15, 1992

Appl. No.:

7/945081

Inventors:

Jason N. Morgan - Huntsville AL
Harold A. Vaghy - Huntsville AL

Assignee:

Universal Data Systems, Inc. - Huntsville AL

International Classification:

G06J 100

US Classification:

364602

Abstract:

An equalizer is arranged for equalizing a received signal comprising 2-binary, 1-quaternary-coded multi-level signals S(-3), S(-1), S(+1), S(+3) corresponding to predetermined signal levels -3, -1, +1, +3, respectively. The equalizer includes a gain unit (107) with an adjustable gain, a filter (111) with an adjustable pole and zero, and a processor (119). The processor adjusts the equalizer by sampling equalized S(+3) signals and adjusting the gain, the pole and the zero so that the average value of the equalized S(+3) signals is substantially equal to +3 volts and the variance of the equalized S(+3) signals is minimized.

US Patent:

57519749, May 12, 1998

Filed:

Mar 27, 1997

Appl. No.:

8/827123

Inventors:

Steven R. Blackwell - Huntsville AL
Charles E. Polk - Athens AL
Jason N. Morgan - Madison AL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04J 600

US Classification:

395301

Abstract:

Data communication stations 10, 12, 14 are connected by way of a shared bus 15 common to all the communication stations. When two stations attempt to access the shared bus simultaneously, a conflict resolution method if used to determine which of the two stations is allowed access to the bus 15. Each station seeking access to the bus 15 serially transmits its address. The priority of the stations is determined, and the station with priority is given access to the bus 15.

US Patent:

20180295449, Oct 11, 2018

Filed:

Apr 6, 2018

Appl. No.:

15/947017

Inventors:

Jason N. Morgan - Brownsboro AL, US
Andrew James Keane - Los Altos CA, US
Micah Brandon Harvey - Madison AL, US
Christopher David Pittman - Huntsville AL, US
Robert Lyle Coates - Huntsville AL, US

International Classification:

H04R 9/02
H04R 7/04
H04R 1/10
H04R 1/28

Abstract:

A dual-diaphragm loudspeaker driver assembly can include a multiple pole magnet structure, and first and second pole piece assemblies can be provided on opposite first and second sides of the multiple pole magnet structure. In an example, each pole piece assembly defines an airgap over a polarity transition region on a respective side of the magnet structure. First and second voice coils can be provided in respective ones of the airgaps, wherein each of the voice coils is coupled to a respective diaphragm assembly, and at least one acoustic tuning port can be configured to provide a damped acoustic communication path between first and opposite second sides of each diaphragm assembly.